USB5841 Data Acquisition
MODE 2 Rate Generator
This Mode functions like a divide-by-N counter. It is typically used to generate a Real Time Clock interrupt. OUT will
initially be high. When the initial count has decremented to 1, OUT goes low for on CLK pulse. OUT then goes high
again, the Counter reloads the initial count and the process is repeated. Mode 2 is periodic; the same sequence is
repeated indefinitely. For an initial count of N, the sequence repeats every N CLK cycles.
GATE=1 enables counting; GATE=0 disables counting. If GATE goes low during an output pulse, OUT is set high
immediately. A trigger reloads the Counter with the initial count on the next CLK pulse; OUT goes low N CLK pulses
after the trigger. Thus the GATE input can be used to synchronize the Counter.
After writing a Control Word and initial count, the Counter will be loaded on the next CLK pulse. OUT goes low N
CLK Pulses after the initial count is written. This allows the Counter to be synchronized by software also.
Writing a new count while counting does not affect the current counting sequence. If a trigger is received after writing a
new count but before the end of the current period, the Counter will be loaded with the new count on the next CLK
pulse and counting will continue from the new count. Otherwise, the new count will be loaded at the end of the current
counting cycle. In mode2, a COUNT of 1 I illegal.
Figure 5.3 Mode 2
Note: A GATE transition should not occur one clock prior to terminal count.
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