SDRAM 16Mb H-die(x16)
CMOS SDRAM
Rev. 1.4 May 2004
FUNCTIONAL BLOCK DIAGRAM
* Samsung Electronics reserves the right to change products or specification without notice.
Bank Select
Data Input Register
512K x 16
512K x 16
Sense AMP
Output Buf
fe
r
I/O Control
Column Decoder
Latency & Burst Length
Programming Register
Address Register
Row
Buf
fer
Refresh Counter
Row Decoder
Col. Buf
fer
LRAS
LCBR
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
L(U)DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
Timing Register
Содержание DV962S
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