Barrett 2000 Series, Техническое руководство, Страница: 14 / 80

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Technical description
Microprocessor / RF PCB – microprocessor section
This PCB is divided into two separated sections. The first section contains the microprocessor, DSP and
frequency synthesizer. The synthesiser provides the stable first local oscillator source, the DSP generates
and demodulates SELCALL and ALE signals, provides functions such as the audio syllabic mute, additional
audio filtering, noise reduction and transmitter power control. This section also contains all but one of the
voltage regulators for the transceiver. Most of the regulators are switch mode types which have high
efficiency.
The second section of the microprocessor / RF PCB comprises the radio receiver, consisting of an input
30MHz low pass filter, first mixer, first IF on 45Mhz, second mixer, second IF section on 455kHz, and the
product detector. Most of the receiver system is reversed in transmit mode to form the exciter.
Reference oscillator 22.7275 kHz
The reference oscillator at 22.7275 MHz is the master clock which determines the frequency and timing of
all other synchronous events in the transceiver. It consists of sub miniature digitally temperature
compensated crystal oscillator X1, JFET amplifier Q1 and logic level translator, Schmitt trigger U55. This
gives a 3Volt peak to peak CMOS compatible square wave. The second local oscillator is exactly twice that
of the reference oscillator, and is derived from a frequency doubler inside the microprocessor U1. The exact
operating frequency of oscillator X1 differs slightly from unit to unit. During factory calibration each
microprocessor is loaded with the offset and an algorithm takes care of the compensation required.
Microprocessor
The microprocessor is a large programmable gate array (PGA) U1, and is configured as a microprocessor
by a program stored in flash memory U44
DDFS and VCO
The synthesiser employs a Direct Digital Frequency Synthesiser U13. This synthesizer has a built in DAC
which saves on external support components. The frequency data is loaded over the DDFS data bus and
the synthesiser is used to generate 1/10 of the VCO (first local oscillator) frequency.
VCO
A push pull oscillator is formed by JFETS Q13 and Q14. This is a low noise format because the FETs
spend most of the time either on or off. The oscillator is voltage tuned by Varicap diodes D6 to D9. The
tuning inductor is L25 which is slug tuned to allow the oscillator to tune between 45 and 75 MHz. The
oscillator is buffered and converted to a 3 volt CMOS square wave signal with a two stage buffer U27 and
U10.
Phase detector
The output from the VCO feeds both the first mixer in the RF section and also to a frequency divider U42.
This is generally set by the microprocessor to divide by 10 to feed the phase detector U56. This is a dual D
type Flip Flop. The other input to the phase detector comes via Q2 from U12 the direct digital frequency
synthesiser (DDFS). This normally operates at 1/10 of the VCO frequency. Thus one tenth of the VCO
frequency is phase compared with that from the DDFS. The phase detector outputs feed a charge pump
formed by Q10, Q11, Q12, Q15 and surrounding parts. The charge pump pushes the loop filter input up or
down in voltage as required to keep the frequency stable. Any error is fed back to the varicap diodes via
the loop filter formed by R158, R113, R157, C157, C1578, and C155.