C O NFIG URA TIO N
1 8 5
1 3.6.1. 5 DIO X SET UP / DIO 1/2/3/4 Make output GET FRO M source connect
i
on
The connect
i
on
i
s made here for the d
i
g
i
ta
l
output b
l
ock source. It may be a
li
near or
l
og
i
c
va
l
ue. A fter process
i
ng by the rect
i
f
i
er box
i
t
gets compared to the thresho
l
d. The
comparator output state HIG H or LO W
i
s then
i
nverted or not
i
nverted by the
i
nverter mode
box. It then proceeds to the output stage
through the d
i
g
i
ta
l
output enab
l
e s w
i
tch and
becomes a 2 4 V
l
og
i
c s
i
gna
l
. It
i
s a
l
so ava
il
ab
l
e
for
i
nterna
l
connect
i
on. See 3.4.2 D
1 3.6.1. 6 DIO X SET UP / DIO 1/2/3/4 Make
i
nput G O T O dest
i
nat
i
on connect
i
on
The d
i
g
i
ta
l
i
nput mode detects w hether the
i
nput
i
s h
i
gh or
l
o w , and then se
l
ects an output va
l
ue
The connect
i
on
i
s made here for the d
i
g
i
ta
l
i
nput LO or HI resu
l
t G O T O dest
i
nat
i
on.
The LO and HI va
l
ues can be entered us
i
ng the
d
i
sp
l
ay and keys. To s w
i
tch dynam
i
ca
ll
y
chang
i
ng va
l
ues, connect them us
i
ng
j
umpers to the LO/HI va
l
ue PINS. For
l
og
i
c on
l
y usage a va
l
ue of 0.0 0 %
i
s read as a
l
o w . A ny non zero + /- va
l
ue
i
s read as a h
i
gh. Log
i
c
i
nvers
i
on
i
s accomp
li
shed by enter
i
ng
0.0 0 %
i
n the va
l
ue for HI w
i
ndo w and 0.0 1 %
i
n the va
l
ue for LO w
i
ndo w .
1 3.6.1. 7 DIO X SET UP / DIO 1/2/3/4 Input h
i
gh va
l
ue PINs 27 5 / 2 8 1 / 2 8 7 / 2 9 3
See 1 3.6.1.6 DIO X SET UP / DIO 1/2/3/4 Make
Note. You can make a s
i
mp
l
e A N D gate by se
l
ect
i
ng th
i
s as the target PIN of a
l
og
i
ca
l
G O T O .
DIO 1 D
i
g
i
ta
l
IO
DIO 1
H
i
gh va
l
ue
Lo w va
l
ue
G O T O
DIO 1
GET FRO M
PIN 2 7 2
Rect/B
i
po
l
ar
PIN 2 7 1
OP mode en
PIN 2 7 5
PIN 2 7 6
T 1 8
PIN 2 7 4
PIN 2 7 3
Thresho
l
d
PIN
6 8 5
DIO Mon
i
tor
PIN 1 6 3
DIO 1 D
i
g
i
ta
l
IO
DIO 1
H
i
gh va
l
ue
Lo w va
l
ue
G O T O
DIO 1
GET FRO M
PIN 2 7 2
Rect/B
i
po
l
ar
PIN 2 7 1
OP mode en
PIN 2 7 5
PIN 2 7 6
T 1 8
PIN 2 7 4
PIN 2 7 3
Thresho
l
d
PIN
6 8 5
DIO Mon
i
tor
PIN 1 6 3
If the
i
nput
i
s h
i
gh then the
HI va
l
ue
i
s se
l
ected.
If the
i
nput
i
s
l
o w then the
LO va
l
ue
i
s se
l
ected.
PIN X X X
PIN X X X
DIO 1 (T 1 8) SET UP 4
GET FRO M
GET FRO M
PIN) Descr
i
pt
i
on of funct
i
on
PAR A ME TER
RA N GE
DEF A ULT
GET FRO M
PIN 0 0 0 to 7 2 0
4 0 0
Def
i
nes the target source PIN for
connect
i
on to the DIO X .
DIO 1 (T 1 8) SET UP 4
G O T O
G O T O
PIN) Descr
i
pt
i
on of funct
i
on
PAR A ME TER
RA N GE
DEF A ULT
G O T O
PIN 0 0 0 to 7 2 0
See 1 3.6.1.9
Def
i
nes the target dest
i
nat
i
on PIN
for connect
i
on to the DIO X .
DIO 1 SET UP 4
2 7 5)DIO 1 IP HI V ALUE
2 7 5)DIO 1 IP HI V ALUE
0.0 1 %
PAR A ME TER
RA N GE
DEF A ULT
PIN
DIO 1 IP HI V ALUE
+ /- 3 0 0.0 0 %
0.0 1 %
2 7 5
Sets the
l
eve
l
of the va
l
ue
se
l
ected by a h
i
gh DIO X
i
nput.
Содержание PLX
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