Balluff BIS V-6106, Техническое описание, Руководство по эксплуатации

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BIS V-6106 Ethernet/IP™
Processor Unit
8 english
The processor unit is the link between data carrier and host control system. It manages two-way
data transfer between data carrier and R/W head and provides buffer storage.
The processor unit uses the R/W head to write data from the host control system to the data
carrier or reads the data from the carrier and makes it available to the host control system.
Host control systems could include:
– A control computer (e.g. industrial PC)
– A PLC.
Double Bit Header:
In order to ensure complete transmission of all data in the data buffer, the control bits in the data
buffer's first and last byte (bit header) are transmitted and compared for each R/W head. If both
bit headers are the same, then the data has been fully updated and can be transmitted. This
means that the data for each R/W head is only valid if both bit headers are the same. Thus, the
host control system must also compare the bits in the bit headers.
In order to increase data integrity, data transfer between the data carrier and processor unit and
the storage device must be monitored using a check procedure.
A CRC_16 data check can be enabled for this via parameter configuration.
With the CRC_16 data check, a check code that allows the validity to be checked at any time is
written to the data carrier.
A CRC_16 data check provides the following advantages:
– Data integrity even during the non-active phase (data carrier outside the R/W head).
– Shorter read time – page is read once.
3.3 Control Function
3.4 Data Integrity
3
Basic Knowledge