PT-5ITA
SYSTEM BOARD
AWARD BIOS SETUP
5-6
5.6
CHIPSET FEATURES SETUP
ROM PCI / ISA BIOS (2A59IXXX)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration
:
Enabled
DRAM Timing
: 60 ns
DRAM Leadoff Timing
: 10/6/3
DRAM Read Burst (EDO/FP)
: x222/x333
DRAM Write Burst Timing
: x222
Fast EDO Lead Off
: Enabled
Refresh RAS# Assertion
: 4 Clks
Fast RAS To CAS Delay
: 3
DRAM Page Idle Timer
: 2 Clks
DRAM Enhanced Paging
: Enabled
Fast MA to RAS# Delay
: 2 Clks
SDRAM(CAS Lat/RAS-to-CAS) : 3/3
SDRAM Speculative Read
: Disabled
System BIOS Cacheable
: Disabled
Video BIOS Cacheable
: Disabled
ESC : Quit
: Select Item
8 Bit I/O Recovery Time
: 1
F1 : Help
PU/PD/+/- : Modify
16 Bit I/O Recovery Time
: 2
F5 : Old Values (Shift)F2 : Color
Memory Hole At 15M-16M
: Disabled
F7 : Load Setup Defaults
PCI 2.1 Compliance
: Disabled
Fig. 5-5 CHIPSET FEATURES SETUP screen.
WARNING :
The CHIPSET FEATURES SETUP in this screen are provided so that
technical professionals can modify the Chipset to suit their
requirement. If you are not a
technical engineer, do not use this program !
Auto Configuration :
When "Enabled", this parameter automatically enters and locks some of the optimum
values for the chipset and CPU. Otherwise, this parameter allows the values of these
parameters could be changed.
DRAM Timing :
When "Auto Configuration" is "Enabled", this parameter provides two suit of the
optimum values for the chipset and CPU, depends on the DRAMs' speed, you can
select "70 ns" or "60 ns", but the first value maybe caused your system more stable.
