AXIOMTEK SBC81821, Руководство пользователя

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SBC81821 Socket478 All-in-One CPU Card Series User’s Manual
Hardware Description
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Name Description
P0~P47 Flat panel data output
ENABKL
Activity Indicator and Enable Backlight outputs
SHFCLK
Shift clock. Pixel clock for flat panel data
M M signal for panel AC drive control
LP
Latch pulse. Flat panel equivalent of HSYNC
FLM
First line marker. Flat panel equivalent of VSYNC
+12VM
+12V power controlled by chipset
ENAVDD
Power sequencing controls for panel LCD Vcc
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Standard mode: IBM PC/XT, PC/AT and PS/2
TM
compatible with bi-directional
parallel port
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Enhanced mode: Enhance parallel port (EPP)
compatible with EPP 1.7 and EPP
1.9 (IEEE 1284 compliant)
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High speed mode: Microsoft and Hewlett Packard
extended capabilities port (ECP)
IEEE 1284 compliant
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