AXIOMTEK NANO820, Руководство пользователя, Страница: 68 / 73

NANO840/842 Nano-ITX Board
62 Digital I/O
Register 1: Output port register.
This register reflects the outgoing logic levels of the pins defined as outputs by Register 3. Bit
values in this register have no effect on pins defined as inputs. Reads from this register return
the value that is in the flip-flop controlling the output selection, not the actual pin value.
Register 1
–
Output port register bit description
Bit Symbol Access Default Value Description
7 O7 R 1
Reflects outgoing logic levels of pins defined as
outputs by Register 3.
6 O6 R 1
5 O5 R 1
4 O4 R 1
3 O3 R 1
2 O2 R 1
1 O1 R 1
0 O0 R 1
Register 2: Polarity Inversion register.
This register allows the user to invert the polarity of the Input port register data. If a bit in this
register is set (written with
‘
1
’
), the corresponding Input port data is inverted. If a bit in this
register is cleared (written with
‘
0
’
), the Input port data polarity is retained.
Register 2
–
Polarity inversion register bit description
Bit Symbol Access Default Value Description
7 N7 R/W 0
Inverts polarity of Input port register data.
0 = Input port register data retained (default
value).
1 = Input port register data inverted.
6 N6 R/W 0
5 N5 R/W 0
4 N4 R/W 0
3 N3 R/W 0
2 N2 R/W 0
1 N1 R/W 0
0 N0 R/W 0
Register 3: Configuration register.
This register configures the directions of the I/O pins. If a bit in this register is set, the
corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this
register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are
configured as inputs with a weak pull-up to V
DD
.
Register 3
–
Configuration register bit description
Bit Symbol Access Default Value Description
7 C7 R/W 1
Configures the directions of the I/O pins.
0 = Corresponding port pin enabled as an output.
1 = Corresponding port pin configured as input
(default value).
6 C6 R/W 1
5 C5 R/W 1
4 C4 R/W 1
3 C3 R/W 1
2 C2 R/W 1
1 C1 R/W 1
0 C0 R/W 1