AXIOMTEK CAPA500, Руководство пользователя

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CAPA500 Intel
®
Core
TM
Processor Family 3.5
” Board
Digital I/O 73
Register 3: Configuration register.
This register configures the directions of the I/O pins. If a bit in this register is set, the
corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this
register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are
configured as inputs with a weak pull-up to V
DD
.
Register 3
– Configuration register bit description
Bit Symbol Access Default Value Description
7 C7 R/W 1
Configures the directions of the I/O pins.
0 = Corresponding port pin enabled as an output.
1 = Corresponding port pin configured as input
(default value).
6 C6 R/W 1
5 C5 R/W 1
4 C4 R/W 1
3 C3 R/W 1
2 C2 R/W 1
1 C1 R/W 1
0 C0 R/W 1