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Figure C
As before, if the delay is negative, the order of the SYNC and OUT pulses is reversed.
The last figure illustrates the relationship between the signal when an external TTL-level
trigger is used in the PW
IN
=PW
OUT
mode. In this case, the output pulse width equals the
external trigger’s pulse width (approximately), and the delay circuit is bypassed:
Figure D
The delay, pulse width, and frequency (when in the internal mode), of the OUT pulse
can be varied with front panel controls or via the GPIB or RS-232 computer interfaces.
20
SYNC OUT
100 ns, FIXED
MAIN OUTPUT
PULSE WIDTH
DELAY > 0
AMPLITUDE,
VARIABLE
3V, FIXED
> 50 ns
TTL LEVELS
(0V and 3V-5V)
TRIG
(external input)
PROPAGATION DELAY (FIXED)
MAIN OUTPUT
PW
OUT
≈ PW
IN
AMPLITUDE,
VARIABLE
TTL LEVELS
(0V and 3V-5V)
TRIG
(external input)
PROPAGATION DELAY (FIXED)
PW
IN
Содержание AVR-3HF-B
Страница 34: ...PCB 158R4 LOW VOLTAGE POWER SUPPLY ...
Страница 35: ...PCB 197H HIGH VOLTAGE DC POWER SUPPLY DISCHARGE ...
Страница 44: ...PERFORMANCE CHECK SHEET 44 ...