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MSC SM2S-IMX8M User Manual
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Signal
Pin Type
Signal
Level
Pin on
i.MX8
Pin name on i.MX8M
Power
Tolerance
PU/PD
Description
PCIE_WAKE#
I
3.3V
CMOS
A3
SAI1_MCLK
3.3V
PU 10k
PCI Express Wake signal. Asserted by
device when requesting wake up.
(CPU GPIO4_IO20)
NOTE:
PCIE_A_RST# and PCIE_B_RST# share same CPU pin.
4.4 USB
The USB controller supports USB 3.0 and USB 2.0.
Depending on the module variant different number of USB lanes are available:
Option 1
with USB 3.0 Hub:
USB[0] = USB 2.0 host/device OTG compliant
USB[1] = USB 2.0 host
USB[2:3] = USB 3.0 host
USB[4] = USB 2.0 host.
Option 2
without USB 3.0 Hub:
USB[0] = USB 2.0 host/device OTG compliant
USB[1] = USB 2.0 host.
Table 4-4: USB Signal Description
Signal
Option
Availability
Pin Type
Signal Level
Pin on
i.MX8M
Pin name on
i.MX8M
Power
Toleranc
e
PU/PD
Description
USB0+
USB0-
1 & 2
I/O
USB
A14
B14
USB1_DP
USB1_DN
3.3V
Differential USB 2.0 data pairs
connected to SoC. Can be
configured as host or device.
Содержание SMARC MSC SM2S-IMX8M
Страница 1: ...SMARC Module MSC SM2S IMX8M SMARC Rev 2 0 Standard Version 1 1 18 03 2021 User Manual ...
Страница 15: ...MSC SM2S IMX8M User Manual 15 92 1 2 Block Diagram Figure 1 1 Block Diagram ...
Страница 65: ...MSC SM2S IMX8M User Manual 65 92 Example Figure 7 7 Create docker container for MSC LDK Part 1 ...
Страница 79: ...MSC SM2S IMX8M User Manual 79 92 Example Figure 7 28 OS boot from network ...
Страница 85: ...MSC SM2S IMX8M User Manual 85 92 Select Edit User Message Figure 7 32 Bug report User message editor ...