Atmel ATtiny25, Руководство пользователя

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7598H–AVR–07/09
ATtiny25/45/85
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
“System Clock Prescaler” on page
29 for details.
6.7.1 High Frequency PLL Clock - PLL
CLK
There is an internal PLL that provides nominally 64 MHz clock rate locked to the RC Oscillator
for the use of the Peripheral Timer/Counter1 and for the system clock source. When selected as
a system clock source, by programming the CKSEL fuses to ‘0001’, it is divided by four like
shown in
Table 6-10 . When this clock source is selected, start-up times are determined by the
SUT fuses as shown in Table 6-11 . See also “PCK Clocking System” on page 23 .
6.8 128 kHz Internal Oscillator
The 128 kHz internal Oscillator is a low power Oscillator providing a clock of 128 kHz. The fre-
quency is nominal at 3V and 25°C. This clock may be select as the system clock by
programming the CKSEL Fuses to “11”.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table 6-12 .
Table 6-10. PLLCK Operating Modes
CKSEL3..0 Nominal Frequency
0001 16 MHz
Table 6-11. Start-up Times for the PLLCK
SUT1..0
Start-up Time from Power
Down and Power Save
Additional Delay from
Reset (V
CC
= 5.0V) Recommended usage
00 1K CK 14CK + 8ms BOD enabled
01 16K CK 14CK + 8ms Fast rising power
10 1K CK 14CK + 68 ms Slowly rising power
11 16K CK 14CK + 68 ms Slowly rising power
Table 6-12. Start-up Times for the 128 kHz Internal Oscillator
SUT1..0
Start-up Time from
Power-down and Power-save
Additional Delay from
Reset Recommended Usage
00 6 CK 14CK BOD enabled
01 6 CK 14CK + 4 ms Fast rising power
10 6 CK 14CK + 64 ms Slowly rising power
11 Reserved