29
ATSAM4C-EK [USER GUIDE]
11251A–ATARM–16-Dec-13
3.15.2 JTAG/ICE Connector
Figure 3-28.
JTAG/ICE Connector
Table 3-12.
JTAG/ICE Connector Pinout
Pin
Signal Name
Description
4, 6, 8, 10, 12,
14, 16, 18, 20
GND
Common ground
1
VTref 3.3V power
This is the target reference voltage. It is used to check if the target has power,
to create the logic-level reference for the input comparators, and to control the
output logic levels to the target. It is normally fed from VDD on the target board
and must not have a series resistor.
2
Vsupply 3.3V power
This pin is not connected in SAM-ICE. It is reserved for compatibility with other
equipment. Connect to VDD or leave open in target system.
3
nTRST TARGET RESET
JTAG Reset (active-low output signal that resets the target). Output from SAM-
ICE to the Reset signal on the target JTAG port. Typically connected to nTRST
on the target CPU. This pin is normally pulled HIGH on the target to avoid
unintentional resets when there is no connection.
5
TDI TEST DATA INPUT
JTAG data input of target CPU (serial data output line, sampled on the rising
edge of the TCK signal). It is recommended that this pin is pulled to a defined
state on the target board. Typically connected to TDI on target CPU.
7
TMS TEST MODE SELECT
JTAG mode set input of target CPU. This pin should be pulled up on the target.
Typically connected to TMS on target CPU. Output signal that sequences the
target's JTAG state machine, sampled on the rising edge of the TCK signal.
9
TCK TEST CLOCK
JTAG clock signal to target CPU (output timing signal, for synchronizing test
logic and control register access). It is recommended that this pin is pulled to a
defined state on the target board. Typically connected to TCK on target CPU.
11
RTCK
Input Return test clock signal from the target.
Some targets must synchronize the JTAG inputs to internal clocks. To assist in
meeting this requirement, a returned and retimed TCK can be used to
dynamically control the TCK rate. SAM-ICE supports adaptive clocking which
waits for TCK changes to be echoed correctly before making further changes.
Connect to RTCK if available, otherwise to GND
13
TDO JTAG TEST DATA OUTPUT
JTAG data output from target CPU (serial data input from the target). Typically
connected to TDO on target CPU.
15
nSRST RESET
Active-low reset signal. Target CPU reset signal
17
RFU
This pin is not connected in SAM-ICE
19
RFU
This pin is not connected in SAM-ICE
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