Atmel ATF15 DK2 Series, Руководство пользователя, Страница: 10 / 15

Hardware Description
CPLD Development/Programmer Kit User Guide 2-7
3300A – PLD – 08/02
2.1.4 V
CC
Select Jumper The V
CC
Select Jumper, labeled VCC Select, on the CPLD Development/Programmer
Board is a two-position jumper that allows the users to select the V
CC
voltage level
(either 3.3V or 5.0V) used by various components on the CPLD Development/Program-
mer Board. This voltage generated by the on-board voltage regulation circuitry is
applied to the V
CC
input pins (both VccINT and VccIO) of the ATF15xx, the common
anode lines of the eight 8-segment LEDs, the V
CC
input of the 2 MHz crystal oscillator,
the two push-button switches, and the V
CC
pin (Pin 4) of the 10-pin JTAG port header
labeled JTAG.
Therefore, when a 3.3V device (ATF15xxASV/ASVL/AE/AEL) is used on this board, the
V
CC
Select Jumper must be in the 3.3V position. On the other hand, when a 5V device
(ATF15xxAS/ASL/SE/SEL) is used on this board, the V
CC
Select Jumper must be in the
5.0V position. This is also true when the ATF15xx is being programmed through ISP on
this board.
2.1.5 JTAG Port Header The JTAG Port Header, labeled JTAG, on the CPLD Development/Programmer Board
is used to connect the ATF15xx's JTAG port pins (TCK, TDI, TMS and TDO) through the
ISP download cable to the parallel printer (LPT) port of a PC for ISP programming of the
ATF15xx. Table 2-10 shows the pin numbers for the four JTAG port pins of the ATF15xx
in all the available package types.
The ISP algorithm is controlled by the ATMISP software, which runs on the PC. The
four JTAG signals are generated by the LPT port and they are buffered by the ISP
download cable before going into the ATF15xx on the CPLD Development/Programmer
Board. The pinout for the 10-pin JTAG Port Header on the CPLD Development/Pro-
grammer Board is shown in Figure 2-3 and the dimensions of this 10-pin male JTAG
header are shown in Figure 2-4.
Table 2-9. Pin Numbers of GCLR, OE1, GCLK1 and GCLK2
Signal
44-lead
TQFP
44-lead
PLCC
68-lead
PLCC
84-lead
PLCC
100-lead
PQFP
100-lead
TQFP
144-lead
TQFP
160-lead
PQFP
GCLR 39 1 1 1 91 89 127 141
OE1 38 44 68 84 90 88 126 140
GCLK1 37 43 67 83 89 87 125 139
GCLK2 40 2 2 2 92 90 128 142
Table 2-10. Pin Numbers of JTAG Port Signals
Signal
44-lead
TQFP
44-lead
PLCC
68-lead
PLCC
84-lead
PLCC
100-lead
PQFP
100-lead
TQFP
144-lead
TQFP
160-lead
PQFP
TDI 1 7 12 14 6 4 4 9
TDO 32 38 57 71 75 73 104 112
TMS 7 13 19 23 17 15 20 22
TCK 26 32 50 62 64 62 89 99