ATA6661/ATA6662 [APPLICATION NOTE]
4968D–AUTO–06/15
4
2.
Schematic and Layout of the ATA6661/ATA6662 Development Board
Figure 2-1.
Schematic of the Development Board for the Atmel ATA6661/ATA6662
Notes: 1.
D2 and R3 are only necessary for a master node.
2.
R5 and D3 are only used in 24V applications. They guarantee that the supply voltage VS never exceeds the
maximum rating of VS
max
= 40V. Refer to the corresponding application note of the Atmel
®
ATA6661 for further
information.
Figure 2-2.
Board Component Placement; Top Side, Top View
33kΩ
220pF
C2
100nF
C4
100nF
VBAT
GND
+5V
RXD
LIN
TXD
WAKE
INH
EN
C3
22μF/50V
C1
R4
INH
X1
X2
X3
0
R5b
10kΩ
R1
4.7kΩ
R2
LL4148
D2
1kΩ
R3
BZG04-33
D3
LL4148
D1
Atmel
ATA6661/
ATA6662
4
3
2
1
GND
LIN
VS
INH
ATA6661-EK
Revision 3.1
ATA6662-EK
INH
TXD
WAKE
Wake
switch
EN
RXD
5
6
7
8
+
100Ω/1W
R5
S1
