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24

4899B–RKE–10/06

ATA3741

Receiving Mode

Intermediate 
frequency

MODE=0 (USA)
MODE=1 (Europe)

f

IF

1.0

1.0

f

XTO 

×

 64 / 314

f

XTO 

×

 64 / 432.92

MHz
MHz

Baud rate 
range

BR_Range0
BR_Range1
BR_Range2
BR_Range3

BR_Range

1.0
1.8
3.2
5.6

1.8
3.2
5.6

10.0

1.0
1.8
3.2
5.6

1.8
3.2
5.6

10.0

BR_Range0 

×

 2 µs / T

Clk

 

BR_Range1 

×

 2 µs / T

Clk

BR_Range2 

×

 2 µs / T

Clk

BR_Range3 

×

 2 µs / T

Clk

kBaud
kBaud
kBaud
kBaud

Minimum 
time period 
between 
edges at 
pin DATA
(

Figure 5-9 

on page 16

)

BR_Range0

BR_Range1

BR_Range2

BR_Range3

T

DATA_min

tmin1
tmin2
tmin1
tmin2
tmin1
tmin2
tmin1
tmin2

149
182

75
91

37.3
45.5
18.6
22.8

147
179

73
90

36.7
44.8
18.3
22.4

9 

×

 T

XClk

11 

×

 T

XCl

9 

×

 T

XClk

11 

×

 T

XClk

9 

×

 T

XClk

11 

×

 T

XClk

9 

×

 T

XClk

11 

×

 T

XClk

µs
µs
µs
µs
µs
µs
µs
µs

Maximum low 
period at 
DATA
(

Figure 5-10

)

BR_Range0
BR_Range1
BR_Range2
BR_Range3

T

DATA_L_max

2169
1085

542
271

2136
1068

534
267

131 

×

 T

XClk

131 

×

 T

XClk

131 

×

 T

XClk

131 

×

 T

XClk

µs
µs
µs
µs

OFF 
command at 
pin ENABLE
(

Figure 5-12

)

T

Doze

3.1

3.05

1.5 

×

 T

Clk

µs

Configuration of the Receiver

Frequency of 
the reset 
marker
(

Figure 5-13

)

f

RM

117.9

119.8

Hz

Programming 
start pulse 
(

Figure 5-11

, 

Figure 5-14

)

BR_Range0
BR_Range1
BR_Range2
BR_Range3
after POR

t1

2188
1104

561
290

11656

3176
3176
3176
3176

2155
1087

553
286

11479

3128
3128
3128
3128

1057 

×

 T

Clk

533 

×

 T

Clk

271 

×

 T

Clk

140 

×

 T

Clk

5632 

×

 T

Clk

1535 

×

 T

Clk

1535 

×

 T

Clk

1535 

×

 T

Clk

1535 

×

 T

Clk

µs

Programming 
delay period 
(

Figure 5-11

, 

Figure 5-14

)

t2

795

798

783

786

384.5 

×

 T

Clk

385.5 

×

 T

Clk

µs

Synchron- 
ization pulse 
(

Figure 5-11

, 

Figure 5-14

)

t3

265

261

128 

×

 T

Clk

µs

Delay until 
the program 
window starts 
(

Figure 5-11

, 

Figure 5-14

)

t4

131

129

63.5 

×

 T

Clk

µs

Programming 
window 
(

Figure 5-11

, 

Figure 5-14

)

t5

530

522

256 

×

 T

Clk

µs

8.

Electrical Characteristics  (Continued)

All parameters refer to GND, T

amb

 = –40°C to +105°C, V

S

 = 4.5V to 5.5V, f

0

 = 433.92 MHz and f

0

 = 315 MHz, unless otherwise specified. 

(V

S

 = 5V, T

amb

 = 25°C)

Parameter

Test Condition

Symbol

6.76438-Mhz Oscillator

(Mode 1)

4.90625-Mhz Oscillator

(Mode 0)

Variable Oscillator

Unit

Min.

Typ.

Max.

Min.

Typ.

Max.

Min.

Typ.

Max.

1

4096

T

CLK

×

---------------------------------

Содержание ATA3741 Series

Страница 1: ...ity Selection or for Controlling External Periphery Communication to the Microcontroller Possible via a Single Bi directional Data Line Power Management Polling is also Possible by Means of a Separate...

Страница 2: ...ver 1 Li cell Keys Microcontroller PLL XTO VCO LNA PLL VCO XTO Encoder ATARx9x Power amp FSK ASK Demodulator and data filter IF Amp 4th Order LPF 3 MHz DEMOD_OUT Limiter out RSSI Sensitivity reduction...

Страница 3: ...ter 4 AVCC Analog power supply 5 AGND Analog ground 6 DGND Digital ground 7 MIXVCC Power supply mixer 8 LNAGND High frequency ground LNA and mixer 9 LNA_IN RF input 10 NC Not connected 11 LFVCC Power...

Страница 4: ...ula The XTO is a one pin oscillator that operates at the series resonance of the quartz crystal The crystal should be connected to GND via a capacitor CL according to Figure 3 1 The value of the capac...

Страница 5: ...ts its highest sensitivity at the best signal to noise ratio in the LNA Hence noise matching is the best choice for designing the transformation network A good practice when designing the network is t...

Страница 6: ...uction this inductor can be easily printed on the PCB This configuration improves the sensitivity of the receiver by about 1 dB to 2 dB IN IN_GND OUT OUT_GND CASE_GND B3555 ATA3741 C3 22p L 25n C16 10...

Страница 7: ...red to the RF input signal at full sensitivity In FSK mode the SNR is not affected by the dynamic range of the RSSI amplifier The output voltage of the RSSI amplifier is internally compared to a thres...

Страница 8: ...refore CDEM cannot be increased to very high values if self polling is used On the other hand CDEM must be large enough to meet the data filter requirements according to the data signal Recommended va...

Страница 9: ...If there is no valid signal present the receiver is in sleep mode most of the time resulting in low current consumption This condition is called polling mode A connected microcontroller is disabled d...

Страница 10: ...ge of all TClk dependent parameters the electrical characteristics display three conditions for each parameter USA Applications fXTO 4 90625 MHz MODE 0 TClk 2 0383 s Europe Applications fXTO 6 76438 M...

Страница 11: ...TPreburst TSleep TStartup TBitcheck TStart_ C 5 2 1 Sleep Mode The length of period TSleep is defined by the 5 bit word Sleep of the OPMODE register on the extension factor XSleep according to Figure...

Страница 12: ...e The receiver is turned on permanently and passes the data stream to the connected microcontroller It can be set to Sleep mode through an OFF command via pin DATA or ENABLE IS ISON OFF command XSleep...

Страница 13: ...o separate time limits If the edge to edge time tee is in between the lower bit check limit TLim_min and the upper bit check limit TLim_max the check will be continued If tee is smaller than TLim_min...

Страница 14: ...CV_Lim reaches Lim_max This is illustrated in Figure 5 7 Figure 5 5 Timing Diagram During Bit Check Figure 5 6 Timing Diagram for Failed Bit Check Condition CV_Lim Lim_min Figure 5 7 Timing Diagram fo...

Страница 15: ...a result converted into the output signal data This processing depends on the selected baud rate range BR_Range Figure 5 8 illustrates how Dem_out is synchronized by the extended clock cycle TXClk Thi...

Страница 16: ...Setting the receiver to sleep mode via DATA is achieved by programming bit 1 of the OPMODE register to 1 Only one sync pulse t3 is issued The duration of the OFF command is determined by the sum of t1...

Страница 17: ...ode there is no need to program the registers Table 5 2 on page 18 shows the structure of the registers As shown in Table 5 1 bit 1 defines if the receiver is set back to polling mode via the OFF comm...

Страница 18: ...tcheck VPOUT Sleep XSleep 0 1 Baud1 Baud0 BitChk1 BitChk0 POUT Sleep4 Sleep3 Sleep2 Sleep1 Sleep0 XSleep Std XSleep Temp Default 0 0 1 0 0 0 1 0 1 1 0 0 LIMIT Register 0 0 Lim_min Lim_max 0 0 Lim_min5...

Страница 19: ...continuously until a valid signal occurs 0 0 0 0 1 1 TSleep 2 ms for XSleep 1 in US European applications 0 0 0 1 0 2 0 0 0 1 1 3 0 1 0 1 1 11 USA TSleep 22 96 ms Europe TSleep 23 31 ms Default 1 1 1...

Страница 20: ...set period tRst A POR is also generated when the supply voltage of the receiver is turned on Table 5 8 Effect of the Configuration Word Lim_min Lim_min Lower Limit Value for Bit Check TLim_min Lim_min...

Страница 21: ...proposal in Section Programming the Configuration Register on page 21 By means of that mechanism the receiver cannot lose its register information without communi cating that condition via the reset m...

Страница 22: ...a register is possible both during sleep and active mode of the receiver During programming the LNA LO low pass filter IF amplifier and the demodulator are disabled The programming start pulse t1 init...

Страница 23: ...Parameter Test Condition Symbol 6 76438 Mhz Oscillator Mode 1 4 90625 Mhz Oscillator Mode 0 Variable Oscillator Unit Min Typ Max Min Typ Max Min Typ Max Basic Clock Cycle of the Digital Circuitry Basi...

Страница 24: ...at pin ENABLE Figure 5 12 TDoze 3 1 3 05 1 5 TClk s Configuration of the Receiver Frequency of the reset marker Figure 5 13 fRM 117 9 119 8 Hz Programming start pulse Figure 5 11 Figure 5 14 BR_Range...

Страница 25: ...r to GND Tamb 40 C to 105 C VS 4 5V to 5 5V f0 433 92 MHz and f0 315 MHz unless otherwise specified VS 5V Tamb 25 C Parameters Test Conditions Symbol Min Typ Max Unit Current consumption Sleep mode XT...

Страница 26: ...rystal fXTO 6 764 MHz 4 906 MHz RS 150 220 Static capacitance of the crystal Cxto 6 5 pF Analog Signal Processing Input sensitivity ASK 300 kHz IF filter Input matched according to Figure 3 3 ASK leve...

Страница 27: ...B 600 kHz fin 433 92 MHz 315 MHz T 25 C VS 5V fIF 1 MHz PRef_FSK Input sensitivity FSK 600 kHz IF filter BR_Range0 df 20 kHz df 30 kHz 95 5 96 5 97 5 98 5 99 5 100 5 dBm dBm Input sensitivity FSK 600...

Страница 28: ...ata signal for full sensitivity BR_Range0 Default BR_Range1 BR_Range2 BR_Range3 tee_sig 270 156 89 50 s s s s Reduced sensitivity RSense connected from pin SENS to VS input matched according to Figure...

Страница 29: ...t Saturation voltage LOW Saturation voltage HIGH IPOUT 1 mA IPOUT 1 mA VOl VOh VS 0 3V 0 08 VS 0 14V 0 3 V V FSK ASK input Low level input voltage High level input voltage FSK selected ASK selected VI...

Страница 30: ...3 IF bandwidth of 600 kHz tube Pb free ATA3741P3 TGQY SO20 3 IF bandwidth of 600 kHz taped and reeled Pb free technical drawings according to DIN specifications Package SO20 Dimensions in mm 9 15 8 65...

Страница 31: ...Parkway San Jose CA 95131 USA Tel 1 408 441 0311 Fax 1 408 487 2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH 1705 Fribourg Switzerland Tel 41 26 426 5555 Fax 41...

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