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programmed into the controller as part of its firmware, and
cannot be changed without reprogramming the device.

The displayed text is presented in one of two modes se-
lected by the four-position DIP switch. In the first mode,
one character at a time enters the display from the right
and moves quickly to the left through each element of the
display to its final position in the assembled message. In
the second mode, the message moves through the dis-
play, from right to left, with the display acting as a window
onto the message. This mode is familiar as the method
often used in displays of stock prices.

The output consists of four DL1414T, four-digit, 17-seg-
ment alphanumeric displays with integral decoders and
drivers. This yields 16 total display elements, each capa-
ble of displaying digits 0-9, the upper case alphabet, and
some punctuation characters. The displayable character
codes are ASCII 20H-5FH.

A power-on reset circuit and six megahertz crystal oscilla-
tor complete the application. Neither external program
memory nor external data memory is used.

Modifications to the Application to Support
In-Circuit Programming

Figure 2 shows the application modified for in-circuit
programming.

It is assumed that the programmer, when inactive, will nei-
ther drive nor excessively load the application.

Since the application does not use external program
memory, EA#/VPP on the controller is connected to V

CC

.

This meets the requirement for programming.

The reset circuit has been modified by the addition of two
transistors, which allow RST on the controller to be forced
high by the programmer.

PSEN# and ALE/PROG#, unused in the basic application,
are under the direct control of the programmer.

Programming requires programmer access to all of the
four AT89C51 I/O ports, as documented in the data sheet.
The programmer is connected directly to those controller
pins which are unused by the application, while access to
pins used by the application requires special treatment, as
explained in the following paragraphs.

The least significant four bits of the address generated by
the programmer are multiplexed onto port one of the con-
troller with the data from the DIP switch. Note that the four
resistors added at the switch are not required in the basic
application, since the AT89C51 provides internal pull-ups
on port one.

During the normal operation of the application, controller
ports zero and two provide data and control signals (re-
spectively) to the displays. During programming and pro-
gram verification, the programmer asserts control of port

zero and part of port two. The programmer is connected
to ports zero and two without buffering, since, when inac-
tive, its presence does not affect the normal operation of
the application.

A transparent latch has been added between port two of
the controller and the display control inputs. The latch
holds the display control signals inactive during program-
ming, which eliminates erratic operation of the displays
due to programmer activity on ports zero and two. No iso-
lation of the display data inputs is required, since data ap-
plied to the inputs is ignored when the control signals are
inactive.

The AT89C51 reset circuit, input multiplexer and output
latch are controlled by a single signal generated by the
programmer. During programming, reset is asserted, the
multiplexer switches inputs, and the latch freezes the dis-
play control lines. 

To ensure that the display control lines are in a known
state before they are latched, an AT89C51 external inter-
rupt is used to allow the programmer to signal the applica-
tion before asserting reset. The application firmware re-
sponds to the interrupt by displaying a message and de-
activating the display control lines.

After programming, when reset is deasserted, the control-
ler ports are high as the latch becomes transparent. Since
the display control inputs are inactive high, the display
contents are not disturbed until the new program writes
the display.

Although not essential to this application, it might be im-
perative in some applications that the state of the periph-
eral circuitry not be disturbed during programming.

The Programmer

The programmer (Figure 3) generates the addresses,
data and control signals necessary to program the
AT89C51 embedded in the application.

The programmer circuitry consists of an AT89C51 and an
RS-232 level translator. The controller runs at 11.0592
megahertz, which allows the serial port to operate at a
number of standard baud rates. A Maxim MAX232 line
driver/receiver produces RS-232 levels at the serial inter-
face while requiring only a five volt supply.

Many of the signals generated by the programmer are
connected directly, without buffering, to the AT89C51 in
the application. These signals, when inactive, are not
three-stated, but are pulled high. The AT89C51 has inter-
nal pull-ups of approximately three KOhms on ports one,
two and three. Because port zero does not have internal
pull-ups, external pull-ups of ten KOhms have been
added to permit proper operation of program verification
mode. The sample application operates correctly in this
environment. If required for compatibility with an applica-

4-10

Microcontroller

Содержание AT89C51

Страница 1: ...not be driven during normal operation ALE PROG is pulsed low during pro gramming but must not be driven during normal operation During programming AT89C51 I O ports are used for the application of mode select addresses and data pos sibly requiring that the controller be iso lated from the application circuitry How this is done is application dependent and will be addressed here only in gen eral te...

Страница 2: ... and pro gram verification the programmer asserts control of port zero and part of port two The programmer is connected to ports zero and two without buffering since when inac tive its presence does not affect the normal operation of the application A transparent latch has been added between port two of the controller and the display control inputs The latch holds the display control signals inact...

Страница 3: ...rammer might respond to a packet by sending a CAN which indicates that a non recoverable error has oc curred and that the transmitter should immediately abort the file transfer If the programmer fails to respond to a packet within a limited period of time the transmitter will resend the same packet The transmitter will continue to resend the same packet until a valid response is received or until ...

Страница 4: ...ng for the next call If the caller hangs up the thirty second period must expire before another call will be answered Calls incoming dur ing the reset delay period are ignored If a valid packet header is received prior to the expiration of the reset delay period the programmer will attempt to read and validate the incoming packet At any time during packet reception an invalid character parity erro...

Страница 5: ...em to an analog telephone line and set the modem switches as indicated below Turn the modem on and apply power to the display appli cation programmer The application will begin executing its program if it contains one The programmer will initial ize the modem as shown by the activity on the modem status indicators Switch settings 1 ON 2 ON 3 ON 4 OFF 5 ON 6 ON 7 ON 8 OFF 9 OFF 10 OFF Installing an...

Страница 6: ... A1 WR DL1414T U2 8 9 10 11 2 1 12 5 4 D0 D1 D2 D3 D4 D5 D6 A0 A1 WR DL1414T U3 8 9 10 11 2 1 12 5 4 P2 0 P2 1 P2 2 P2 3 P2 4 P2 5 P2 6 P2 7 D0 D1 D2 D3 D4 D5 D6 A0 A1 WR DL1414T U4 8 9 10 11 2 1 12 5 4 D0 D1 D2 D3 D4 D5 D6 A0 A1 WR DL1414T U5 8 9 10 11 2 1 12 5 4 21 22 23 24 25 26 27 28 P0 0 P0 1 P0 2 P0 3 P0 4 P0 5 P0 6 P0 7 39 38 37 36 35 34 33 32 PSEN ALE PROG P3 6 WR P3 7 RD 29 30 16 17 AT89C...

Страница 7: ...Figure 2 AT89C51 Moving Display Application Modified for In Circuit Programming Microcontroller 4 15 ...

Страница 8: ...Figure 3 AT89C51 Programmer 4 16 Microcontroller ...

Страница 9: ...Figure 4 FTP Transmit Mode Microcontroller 4 17 ...

Страница 10: ...Figure 5 FTP Receive Mode 4 18 Microcontroller ...

Страница 11: ...eld consists of four hex digits and in dicates the absolute address at which the data in the data field is to be loaded The record type field consists of two hex digits which are always zero in data records The data field contains from one to 16 pairs of hex digits The last two hex digits are a checksum on the record length load address record type and data fields The sum of the binary equivalents...

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