Atmel AT73C246-EK1, Руководство пользователя

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AT73C246-EK1 Evaluation Kit User Guide 2-5
11047A–PMAAC–08-Apr-10
2.7 Communication Interfaces
2.7.1 Communication Interfaces Header (J15)
The following table details the pin assignments for each signal. All signal, I²S or TWI, are processed by
the USB-to-Serial module. If needed the user can drive directly these signals (using a microcontroller for
example) trough J15.
Figure 2-4. Communication Interfaces Header (J15)
Note: For a reason of I/O level configuration between the AT73C246 and an external microcon-
troller and If using another interface then the USB Communication Box, the VDD3 or VDD0
should be connect on J15 by soldering a 0 ohms resistor on its pads (see VPAD Selection
“AT73C246-EK1 Schematic - Power Supply Page” on page 7-5 ).
Table 2-2. Communication Interface Header Pins Assigning
Pin N° Signal Name Description Pin N° Signal Name Description
1 WAKEUP3 - 2 Vin Not Used
3 WAKEUP2 - 4 DGND Digital Ground
5 WAKEUP1 - 6 - Not Used
7 RSTB Component Reset 8 DGND Digital Ground
9 TWCK TWI Clock 10 VDDIO I/O level
11 LRFS-Signal I²S Frame Clock 12 MCLK I²S Master Clock
13 DAI-Signal I²S Data in 14 ITB Interrupt
15 DAO-Signal I²S Data out 16 - Not Used
17 BCLK-Signal I²S Bit Clock 18 - Not Used
19 - Not Used 20 TWD TWI Data I\O
J15
1
2
19
20