
S u b C o m p a c t B o a r d
G E N E - C V 0 5
Appendix E Digital I/O
E-2
E.1 Digital I/O
The F75111 provides one serial access interface, I2C Bus, to read/write
internal registers. The address of Serial Bus is 0x6E (0110_1110)
The related register for configuring DIO is list as follows:
Configuration and Control Register-Index 01h
Power-on default [7:0]=0000_1000b
Bit Name
R/W
PWR
Description
7
INIT
R/W VSB3V
Software reset for all registers
including Test Mode registers.
Users use only.
6
Reserved
R/W VSB3V
5
EN_WDT10
R/W VSB3V
Enable Reset Out. If set to 1,
enable WDTOUT10# output.
Default is disable.
4
Reserved
R/W VSB3V
3
Reserved
R/W VSB3V
2
Reserved
R/W VSB3V
1
SMART_P
OWR_MAG
EMENT
R/W VSB3V
Set this bit to 1 will enable auto
power down mode, when all
function are idle then 20ms the
chip will auto power down, it will
wakeup when GPIO state change
or read write register
0
SOFT_PO
WR_DOW
N
R/W VSB3V
Set this bit to 1 will power down all
of the analog block and stop
internal clock, write 0 to clear this
bit or when GPIO state change will
auto clear this bit to 0.
Содержание GENE-CV05
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