Astronics 407661-001, Руководство пользователя

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Publication No. 980824-114 Rev. A 1260-114 User Manual
Astronics Test Systems Module Operation 3-11
Table 3-6, Control Register 2 Functionality of the 1260-114 Module
Register Table
Control Register 2
Module Version Bit Functionality Description
TTL and CMOS
(As written to register:
bits 0-3 normally read
inverted unless external
port tri-state pin is ‘0’ in
which case bit will
always read a ‘1’) 0 0: Port I Input Port 1: Port I Output Port
1 0: Port J Input Port 1: Port J Output Port
2 0: Port K Input Port 1: Port K Output Port
3 0: Port L Input Port 1: Port L Output Port
4 Bits 4-7 control whether ports A-L act in synchronous or
asynchronous mode. Bits 4-7 enable synchronous mode for the
port specified and all lower order ports while higher ports are set
to asynchronous mode (i.e. 0x0 = all ports asynchronous, 0xB =
all ports synchronous, 0x3 = ports A-C synchronous)
5
6
7
OC
0 Not Used
1 Not Used
2 Not Used
3 Not Used
4 Bits 4-7 control whether ports A-L act in synchronous or
asynchronous mode. Bits 4-7 enable synchronous mode for the
port specified and all lower order ports while higher ports are set
to asynchronous mode (i.e. 0x0 = all ports asynchronous, 0xB =
all ports synchronous, 0x3 = ports A-C synchronous)
5
6
7
HVOC
0 Not Used
1 Not Used
2 Not Used
3 Not Used
4 Bits 4-7 control whether ports A-F act in synchronous or
asynchronous mode. Bits 4-7 enable synchronous mode for the
port specified and all lower order ports while higher ports are set
to asynchronous mode (i.e. 0x0 = all ports asynchronous, 0x6 =
all ports synchronous, 0x3 = ports A-C synchronous)
5
6
7