Z490D4U-2L2T / W480D4U Series
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English
ODT WR (B1)
Configure the memory on die termination resistors' WR for channel B1.
ODT WR (B2)
Configure the memory on die termination resistors' WR for channel B2.
ODT NOM (A1)
Use this to change ODT (CH A1) Auto/Manual settings. The default is [Auto].
ODT NOM (A2)
Use this to change ODT (CH A2) Auto/Manual settings. The default is [Auto].
ODT NOM (B1)
Use this to change ODT (CH B1) Auto/Manual settings. The default is [Auto].
ODT NOM (B2)
Use this to change ODT (CH B2) Auto/Manual settings. The default is [Auto].
ODT PARK (A1)
Configure the memory on die termination resistors' PARK for channel A1.
ODT PARK (A2)
Configure the memory on die termination resistors' PARK for channel A2.
ODT PARK (B1)
Configure the memory on die termination resistors' PARK for channel B1.
ODT PARK (B2)
Configure the memory on die termination resistors' PARK for channel B2.
COMP Setting
Dll Bandwidth 0
Configure Dll Bandwidth 0 (1067 MHz) to maximize the performance of
intergrated memory controller.
Содержание W480D4U
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