[AKD2300]
<KM103501> 2015/02
2
Power supply pins
Power supply pins is VDD,VSS,LVDD,LVDDX,VDDX_3.3V,VSSX.
Please feed 1.7V
~
3.6V to the LVDD and LVDDX, and feed 2.6V
~
3.6V to the VDD. Supply 3.3V to VDDX_3.3V.
However, set to become VDD
≧
LVDD. Connect VSS and VSSX with GND.
Each power supply and GND can be connected by the JP1 and the JP2 and the JP3 and the JP4.
These jumpers settings are shown below. When the digital noise influences on analog characteristics, please remove
these jumpers to separate these power line.
Jumper Name
Function
JP1
LVDD and LVDDX are connected.
JP2
VDD and VDDX_3.3V are connected.
JP3
VDD and LVDD are connected.
JP4
VSS and VSSX are connected.
The PLD Setting Switches
The DSW2 and the DSW3 and the DSW4 are switches of the PLD settings. (DSW1 is unused)
The functions of the switches are shown below.
DSW2
Switch Name
Function
FRQ2
FRQ1
FRQ0
BCLK Selection
This switch is selects internal BCLK frequency.
FRQ2
FRQ1
FRQ0
Frequency
0
0
0
64kHz
0
0
1
128kHz
0
1
0
256kHz
0
1
1
512kHz
1
0
0
1024kHz
1
0
1
2048kH
1
1
*
Don’t care