21
VMEbus Interface
1
must enter the channels to calibrate into the SCR and the digital representation of the
expected result of the calibration voltage into the TCVH and TCVL. The DSP uses
these values in determining the gain and offset coefficients. The equation for
determining the digital representation of the expected result is given in the Target
Calibration Voltage Register (TVC) section on page 56.
The DSP will read the SCR to determine which channels to calibrate. The channels
selected will be digitized and stored in DSP memory. After all the selected channel’s
data has been stored for the present calibration voltage, the board sets the
Chan Cal’d
bit in the BCR.
NOTE:
Polling of the Chan Cal’d bit during the calibration can reduce accuracy,
particularly on the low ranges. From the time the Init Cal bit is set to the Chan Cal’d
bit being set is approximatedly 22 seconds (90 seconds for ranges below 100 mV). The
Chan Cal’d
bit should be checked after allowing for this time.
1. The user can enter another value into TCVH and TCVL and set the
INIT CAL
bit.
This adds another point in the calibration curve for determining gain and offset
coefficients. A minimum of three points is required for a successful calibration.
Failure to enter three calibration voltages results in an error message to the BRR.
A maximum of seven points is allowed. Attempting to enter more than seven
calibration voltages results in an error message to the BRR. If this error occurs,
set the
CAL Done
bit in the BCR or terminate calibration. During the calibration
process, the BRR will read the board ID. If a calibration error occurs, as described
above, the BRR will indicate the error per Table 3-4 on page 51.
2. If the user has entered at least the minimum and not greater than the maximum
number of calibration points and is finished with calibrating, the
Cal Done
bit in
the BCR must be set. This tells the DSP the user has finished calibration and to
calculate the gain and offset coefficients. After the DSP is finished calculating the
coefficients, the
Cal Done
bit is cleared, the front panel LED is turned OFF, and
$0000
is written to the BRR. When a VMEbus read indicates
$0000
, the user
knows the coefficients have been calculated and the board is accessible.
The
Calibration Mode
can be terminated up to the point preceeding the
CAL Done
bit
being set without affecting the current coefficients. This is done by setting both the
INIT CAL
and
CAL Done
bits in the BCR. The DSP will recongnize this as the user
terminating calibration and will return to the
Normal Mode
. Figure 1-2 on page 24
shows the calibration flowchart from the user’s standpoint.
Reconfiguration Mode
The board enters the
Reconfiguration Mode
when the
SYS RECONFIG
bit in the BCR is set
by the user. The board will stop processing data and the front panel LED will
illuminate if Jumper E10 is omitted. During the reconfiguration process, VMEbus
access should be limited to reading the Board Ready Register (BRR). The BRR’s data
appears as
$3B00
(
$3B01
for the 8-channel option) while reconfiguration is active. The
user must enter the channels to be reconfigured in the SCR. Also, the CSR of each
channel to be reconfigured must have the new information written to it prior to the
SYS RECONFIG
bit being set. After completing the reconfiguration of the indicated
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