Artesyn BajaPPC-750, Руководство пользователя

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0002M621-15
4
On-Card Memory
Configuration
The BajaPPC-750 has a 32-pin, plastic-leaded chip carrier (PLCC) socket to sup-
port up to 512 kilobytes of EPROM or flash memory. The BajaPPC-750 also incor-
porates an 8-bit, 4-megabyte flash device and a 64-bit, 8-megabyte flash bank to
provide an additional 12 megabytes of User Flash memory. The board supports
on-card synchronous DRAM configurations of up to 256 megabytes. Off-card
memory is accessible via the PMC/PCI and VMEbus interfaces.
4.1 MPC106 Memory Interface
The Motorola MPC106 acts as the memory controller for the BajaPPC-750.
Table 4-1 lists the control registers associated with the memory interface.
Chapter 5 describes the PCI bridge. Please refer to the
MPC106 PCI Bridge/Memory
Controller User’s Manual for complete details on the memory interface registers.
Table 4-1. MPC106 Memory Interface Configuration Registers
MPC106
Hex Address Size in
Bytes Access
Mode
Register Name
80-87 8 R/W Memory Starting Address
88-8F 8 R/W Extended Memory Starting Address
90-97 8 R/W Memory Ending Address
98-9F 8 R/W Extended Memory Ending Address
A0 1 R/W Memory Enable
A3 1 R/W Page Mode Counter/TImer
F0 4 R/W Memory Control Configuration 1
F4 4 R/W Memory Control Configuration 2
F8 4 R/W Memory Control Configuration 3
FC 4 R/W Memory Control Configuration 4