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AT32F413
Series Reference Manual
2022.06.27
Page 232
Rev 2.00
gives an example of the combination between upcounting mode and PWM mode A. The
output signal behaves when PR=0x32 but CxDT is configured with a different value.
gives an example of the combination between up/down counting mode and PWM mode A.
The output signal behaves when PR=0x32 but CxDT is configured with a different value.
gives an example of the combination between upcounting mode and one-pulse PWM mode
B. The counter only counts only one cycle, and the output signal sents only one pulse.
Figure 14-61
C1ORAW toggles when counter value matches the C1DT value
0
1
2
3
...
31
32
0
1
2
3
...
31
32
0
1
2
3
COUNTER
31
32
0
1
...
PR[15:0]
C1ORAW
TMR_CLK
0
DIV[15:0]
32
011
C1OCTRL
[2
:
0]
3
C1DT[15
:
0]
Figure 14-62
Upcounting mode and PWM mode A
0
1
2
3
...
31
32
0
1
2
3
...
31
32
0
1
2
3
COUNTER
31
32
0
1
...
PR[15:0]
C1ORAW
TMR_CLK
0
DIV[15:0]
32
110
C1OCTRL[2
:
0]
3
C1DT[15
:
0]
C1ORAW
0
0
CIDT[15
:
0]
C1ORAW
32
C1DT[15
:
0]
1
C1ORAW
>32
C1DT[15
:
0]
Figure 14-63
Up/down counting mode and PWM mode A
0
1
2
3
...
31
32
31
30
...
3
2
1
0
1
2
3
...
COUNTER
31
32
31
30
30
PR[15:0]
C1ORAW
TMR_CLK
0
DIV[15:0]
32
110
C1OCTRL[2
:
0]
3
C1DT[15
:
0]
C1ORAW
0
0
CIDT[15
:
0]
1
C1ORAW
≥
32
C1DT[15
:
0]