ARTERY AT32F413 Series, Справочное руководство, Страница: 211 / 369

AT32F413 Series Reference Manual
2022.06.27 Page 211 Rev 2.00
Figure 14-38
gives an example of output compare mode (toggle) with C1DT=0x3. When the counter
value is equal to 0x3, C1OUT toggles.
Figure 14-39
gives an example of the combination between upcounting mode and PWM mode A. The
output signal behaves when PR=0x32 but CxDT is configured with a different value.
Figure 14-40
gives an example of the combination between upcounting mode and one-pulse PWM
mode B. The counter only counts only one cycle, and the output signal sents only one pulse.
Figure 14-38 C1ORAW toggles when counter value matches the C1DT value
0 1 2 3
...
31 32 0 1 2 3
...
31 32 0 1 2 3 COUNTER 31 32 0 1
...
PR[15:0]
C1ORAW
TMR_CLK
0 DIV[15:0]
32
011
C1OCTRL
[2
：
0]
3
C1DT[15
：
0]
Figure 14-39 Upcounting mode and PWM mode A
0 1 2 3 ... 31 32 0 1 2 3
...
31 32 0 1 2 3
COUNTER
31 32 0 1
...
PR[15:0]
C1ORAW
TMR_CLK
0
DIV[15:0]
32
110
C1OCTRL[2
：
0]
3
C1DT[15
：
0]
C1ORAW
0
0 CIDT[15
：
0]
C1ORAW
32
C1DT[15
：
0]
1
C1ORAW
>32
C1DT[15
：
0]
Figure 14-40 One-pulse mode
0
1
2
3 4 5 6
...
40 41 42 43 44
...
5F 60 61 0 COUNTER
61
PR[15
：
0]
42
C1DT[15
：
0]
TRGIN
C1ORAW
C1OUT