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3.2
System Control Processor (SCP) firmware
The System Control Processor (SCP) manages the overall power, clock, reset, and system control of the
ADP. Because of the hardware design, the SCP firmware is an inherently trusted part of the ADP
software system. All the memory that the SCP uses for execution and private storage is on-chip to
prevent attackers tampering with it.
Note
The SCP Firmware is only available as a pre-built binary.
3.2.1
SCP ROM firmware
The SCP ROM firmware is the first code to execute on the Juno ADP after a cold reset. This code is
fixed for the lifetime of the device and therefore executes minimal code to maximize robustness and
reduce the risk of security vulnerabilities.
The SCP ROM firmware configures the initial state of the hardware platform, for example:
• Cores that are released from reset.
• Clocks that are running and their default frequencies.
• Power domains within the SoC which are powered on.
Boot protocol
The SCP ROM firmware interacts with the ARM Trusted Firmware, which securely transfers the SCP
RAM firmware image to the SCP at runtime. The SCP then passes control from the SCP ROM firmware
to the SCP RAM firmware and the boot process continues.
More information about the Boot Over MHU (BOM) protocol used for this process is available as part of
the
ARM Compute Subsystems SCP Message Interface Protocols
infocenter.arm.com/help/topic/com.arm.doc.dui0922-/index.html
.
3.2.2
SCP RAM firmware
The SCP RAM firmware is a second firmware image for the SCP which provides runtime services to the
application processors.
3.2.3
System Control and Power Interface (SCPI)
The SCPI is the generic runtime interface to the SCP from the AP through the MHU.
It includes:
• Reporting the capabilities of the system and certain devices within it. For example, reporting the
available sensors, or the number of power domains.
• Control of power domains and voltages.
• Control of PLLs and clock frequencies.
• Control of the performance level of the processors and GPU through
Dynamic Voltage and Frequency
Scaling
(DVFS).
• Watchdog and timer services.
• Sensor monitoring, thermal cut-out, and fault reporting.
This interface is described in described in the
ARM Compute Subsystems SCP Message Interface
Protocols
document, available from
http://infocenter.arm.com/help/topic/com.arm.doc.dui0922-/
3 Firmware
3.2 System Control Processor (SCP) firmware
ARM DEN0928F
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3-27
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