Link area 2 Reset, Bus Requests/Acknowledges, Clock.
Notes:
If LK2B2 is made, the state of LK2C and D is irrelevant.
If LK2B2 is made, an external arbiter cannot be used, and the SC88T must be the
only master on the STEbus.
The request and acknowledge must be on the same level if an external arbiter is
used. This means that if LK2C1 is made, LK2D1 must also be made.
Alternatively, if LK2C2 is made, LK2D2 must also be made.
Link area 3 Non-Maskable Interrupts (NMIs)
Link area 4 RAM size
Link area 5 Board reset
Page 11
J90 SC88T
2192-08819-000-000
+ LK2A
LK2B1
+ LK2B2
LK2C1
LK2C2
LK2D1
LK2D2
LK2E
SYSRST* to bus from this board
Accept bus acknowledges from
external arbiter
Ignore arbitration, single master only
Bus requests on BUSRQ1*
Bus requests on BUSRQ0*
Bus acknowledges on BUSACK1*
Bus acknowledges on BUSACK0*
SYSCLK from this board
+ LK3A
LK3B
LK3C
NMI disabled
NMI from ANRQ0*
NMI from TFRERR*
+ LK4 open
LK4 made
8k RAM chips installed
(e.g. 6264 or similar)
32k RAM chips installed
(e.g. 55257 or similar)
LK5A
+ LK5B
This board is reset from the STEbus
This board is reset from a switch
across PL2
Figure 3.
Link area 2.
o A o
o B1 o B2 o
o C1 o C2 o
o D1 o D2 o
o E o
Figure 4.
Link area 3.
o A o
o B o
o C o
Figure 5.
Link area 4.
o
o
Figure 6.
Link area 5.
o A o B o
Содержание SC88T
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