- III -
4.2.8 Second Super IO Configuration
4.2.9 Platform Thermal Configuration
4.3 Chipset Settings ......................................................66
4.3.1 North Bridge .........................................................67
4.3.2 South Bridge Configuration
................................68
4.4 Boot Settings ...........................................................69
4.5 Security.....................................................................71
4.6 Save & Exit ...............................................................73
Appendix .................................................................................76
Appendix A: I/O Port Address Map ..............................77
Appendix B: Interrupt Request Lines (IRQ) ................79
Appendix C: Memory Mapping .....................................80
Appendix D: Digital I/O Setting .....................................82
Appendix E: Watchdog Timer (WDT) Setting ..............84
Index
Содержание FPC-7500 Series
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