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BIOS
3.5 Advanced Chipset Features
CAS Latency Time
It allows CAS latency time in HCLKs as 2 or 2.. The system board designer
should set the values in this field, depending on the DRAM installed. Do not
change the values in this field unless you change specifications of the installed
DRAM or CPU.
Setting: 2. (Default), 2.
Interleave Select
It allows you to Use the Interleave Select option to specify how the cache
memory is interleaved.
Setting: LOI (Default), HOI.
XOR BA0
Setting: Disabled (Default), Enabled.
XOR BA1
Setting: Disabled (Default), Enabled.
Содержание EmModule-621E
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Страница 5: ...Introduction 1 Chapter 1 Introduction Chapter 1 Introduction...
Страница 11: ...Introduction 1 10 Board Dimensions Unit mm...
Страница 12: ...Introduction Unit mm...
Страница 13: ...Installation 2 Chapter 2 Installation Chapter 2 Installation...
Страница 29: ...25 BIOS 3 Chapter 3 BIOS Chapter 3 BIOS...
Страница 47: ...43 BIOS 3 8 PC Health Status Current CPU Temperature CPU MEM VCore VCC3 5V 12V VBAT V 5VSB...
Страница 57: ...53 Appendix 4 Chapter 4 Appendix Chapter 4 Appendix...
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