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functions.
The LEDs are mounted on the lower edge of the motherboard between the
Secondary Alpha Slot B Module and the Internal I/O connector area (J40
through J47). Their orientation is shown in Figure 5-1.
Figure 5-1
LED Status Indicators
Use Table 5-1 to interpret the LED status information
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Utilizing an ISA-based POST card module, you can monitor the sequential
steps as the system is initialized from the SROM. Each post code, its source
and a description of its message is listed in Table 5-2.
D4
D8
D10
D6
D11
D5
D9
D7
Table 5-1
LED Status Indicators
LED
from photo
Function
Comment
D4
SCLK_L
ON while TIGPAL sends clock to Clock Generator
D5
SDATA_L
ON while TIGPAL sends data to Clock Generator
Secondary Alpha Slot B Module CPU:
D6
DC_OK
ON when reset FPGA senses the DC_OK signal
D7
SROM
Fast flash (LED appears ON, but dim) while SROM is
being loaded
D8
PWRGOOD
ON when reset FPGA senses the Core-Power Good signal
Primary Alpha Slot B Module CPU:
D9
DC_OK
ON when reset FPGA senses the DC_OK signal
D10
SROM
Fast flash (LED appears ON, but dim) while SROM is
being loaded
D11
PWRGOOD
ON when reset FPGA senses the Core-Power Good signal