Distributor of Anaren: Excellent Integrated System Limited
Datasheet of A110LR09C00GM - IC RADIO MOD 915MHZ U.FL 24-LGA
Contact us: [email protected] Website: www.integrated-circuit.com
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A110LR09x
– User’s Manual
Release Date 10/31/11
1.3.
Features
Features:
Frequency range: 868-870MHz & 902-
928MHz
Ultra small package size
A110LR09C : 9mm x 12mm x 2.5mm
A110LR09A : 9mm x 16mm x 2.5mm
Impedance controlled multi-layer PCB
27 MHz Crystal Frequency
Shielded Package
1.8 to 3.6 V operation
SPI Interface
ROHS Compliant
LGA Footprint
Low Power Consumption
Regulatory approvals for ETSI, FCC
and IC
Digital RSSI output
Programmable channel filter bandwidth
Programmable output power up to +12
dBm
High sensitivity (
–112 dBm at 1.2
kBaud, 1% packet error rate)
Low current consumption (14.7 mA in
RX, 1.2kBaud, input well above
sensitivity limit)
Fast startup time: 240µs from SLEEP
to Rx or Tx mode
Separate 64 byte Rx and Tx FIFOs
Programmable data rate from 0.6 to
600 kBaud. Please note that only
approved configurations are allowed
under the current certification.
Sleep state: 0.4µA
Idle State: 1.7mA
Benefits Summary:
Operating temperature -40 to +85C
100% RF Tested in production
Common footprint for all family
members
No RF engineering experience
necessary
Only requires a 2 layer PCB
implementation
Excellent receiver selectivity and
blocking Performance
Suited for systems compliant with ETSI
EN 300 220, FCC 15.247, and IC RSS-
210 and RSS-Gen
No regulatory “Intentional radiator”
testing is required to integrate the
module into an end product. Simple
certification labeling replaces testing.
1.4.
Theory of Operation
The A110LR09A and A110LR09C are for low power wireless applications in the European 868
– 870MHz, and US 902 – 928MHz ISM band. The devices can be used to implement a variety
of networks, including; point to point, point to multipoint, peer to peer and mesh networks.
The A110LR09A and A110LR09C both interface to an application microcontroller via an SPI
bus. Physical and MAC layer functionality are accessed via the SPI bus through addressable
registers as well as execution commands. Data received, or to be transmitted, are also
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