Analog Devices UG-442, Руководство пользователя

Страница: 8 / 16

UG-442 Evaluation Board User Guide
Rev. C | Page 8 of 16
EVALUATION BOARD SCHEMATICS AND ARTWORK
08230-004
SDO
CLE AR_S EL ECT
CLE AR
FAU LT
SDI N
SCL K
LA TCH
DGND
DGND
DGND
0V
+
5V
RE
D
R1
7
100kΩ
C2
9
0.
1µ
F
C3
3
22p
F
C3
2
22p
F
1
V
BUS
2
D–
3
D+
4
IO
5
G
ND
SH
IEL
D
J1
US
B-
M
INI
-B
R2
2
10kΩ
R1
6
100kΩ
R1
8
0Ω
C3
0
0.
1µ
F
C2
1
0.
1µ
F
C2
2
0.
1µ
F
C2
3
0.
1µ
F
C2
4
0.
1µ
F
C2
5
0.
1µ
F
C2
6
0.
1µ
F
C2
7
0.
1µ
F
Y2
24 M
H
z
C2
0
0.
1µ
F
8
IN1
7
IN2
5
SD
4
G
ND
1
O
UT
1
2
O
UT
2
6
E
RRO
R
3
NR U3
A
D
P
3303-
3.
3
R2
3
1kΩ D1
C1
8
0.
1µ
F
R2
0
10kΩ
R1
9
10kΩ
R2
1
10kΩ
R2
4
2.
2kΩ
R2
5
2.
2kΩ
C3
4
0.
1µ
F
1
A0
2
A1
3
A2
4
VSS
5
SD
A
6
SC
L
7
W
P
8
V
CC
U5
24L
C
64
50
P
D5
/F
D1
3
51
P
D6
/F
D1
4
52
P
D7
/F
D1
5
54
CL
KO
UT
1
RDY
0
/*
S
L
RD
2
RDY
1
/*
S
L
WR
4
X
T
AL
O
UT
5
X
T
AL
IN
8
D+
9
D–
13
IFC
LK
14
R
SVD
15
SC
L
16
SD
A
18
P
B0
/F
D0
19
P
B1
/F
D1
20
P
B2
/F
D2
21
P
B3
/F
D3
49
P
D4
/F
D1
2
48
P
D3
/F
D
1
1
47
P
D2
/F
D1
0
46
P
D1
/F
D9
45
P
D0
/F
D8
44
*W
AKE
U
P
42
R
ESET
40
P
A7
/*
F
L
D/
S
L
CS
39
P
A6
/*
P
KT
E
ND
38
P
A5
/F
IF
O
ADR1
37
P
A4
/F
IF
O
ADR0
36
P
A3
/*
W
U2
35
P
A
2
/*
S
L
OE
34
P
A1
/I
NT
1
33
P
A0
/I
NT
0
31
C
TL2
/*
FLA
G
C
30
C
TL1
/*
FLA
G
B
29
C
TL0
/*
FLA
G
A
25
P
B7
/F
D7
24
P
B6
/F
D6
23
P
B5
/F
D5
22
P
B4
/F
D4
3
AV CC
7
VCC
11
VCC
17
VCC
27
VCC
32
VCC
43
VCC
55
VCC
6
AGND
10
GND
12
GND
26
GND
28
GND
41
GND
53
GND
56
GND
U4
C
Y
7C
68013-
C
S
P
C3
1
2.
2µ
F
+
C1
9
10µ
F
20%
1 IN
2
S1
A
3
S1B
4
D1
5
S2
A
6
S2B
7
D2
8
G
ND
9
D3
10
S3B
1
1
S3
A
12
D4
13
3
6
10
13
S4B
14
S4
A
15
EN
16
V
DD
U7
ADG
7
7
4
1 IN
2
S1
A
S1B
4
D1
5
S2
A
S2B
7
D2
8
G
ND
9
D3
S3B
1
1
S3
A
12
D4
S4B
14
S4
A
15 EN
16
V
DD
U8
ADG
7
7
4
A B
LK7
J8-1
J8-2
J8-3
J8-4
J8-5
J8-6
J8-7
J8-8
J8-9
J8-10
J7-
1
J7-
2
C5
5
0.
1µ
F
+
C5
6
10µ
F
A B
L
K8
C5
7
0.
1µ
F
A B
L
K1
A B
L
K2
A B
L
K6
C2
8
0.
1µ
F
3.
3V
3.
3V
3.
3V
3.
3V
3.
3V
P
A3
P
A2
CS
_
ADC
U
SB
_
PO
W
ER
3.
3V
3.
3V
3.
3V
3.
3V
3.
3V
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
PG ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
P
G
ND
PG ND
L
A
T
CH
S
CL
K
S
DI
N
F
AU
L
T
CL
E
AR
CL
E
AR_
S
E
L
E
CT
S
DO
DV
CC
DV
CC
DV
CC
P
A5
P
A6
P
A7
P
A3
P
A2
F
D7
DO
UT
_
ADC
F
D7
P
A5
P
A6
P
A7
P
G
ND
DG
ND
DGND
DG
ND
DG
ND
DG
ND
5V
S
DI
N_
ADC
S
CL
K_
ADC
P
G
ND
DV
CC
DV
CC
DG
ND
DG
ND
F
D8
F
D8
EXT
_
5
V
DV
CC
P
G
ND
Figure 5. AD5422 TSSOP Evaluation Board Schematic of the Controller Circuitry