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HSC-ADC-EVALC 

 

 

Rev. 0 | Page 24 of 32 

I/O CONNECTOR—J1, J2, AND J3 PIN MAPPING 

D

C

B

A

D

C

B

A

D

C

B

A

D17

A

–

D

16A–

D

14

A

–

D12A–

D

10A

–

D

8A–

D

6A–

D

4A–

D

2A–

D

0A–

D17A+

D

16

A

+

D14A+

D

12A+

D

10A

+

D

8A+

D

6A+

D

4A+

D

2

A

+

D

0

A

+

DC

L

KA1

–

D15A–

D

13

A

–

D11A–

D

9A–

D

7A–

D

5A–

D

3A–

D

1A–

DC

LK

A2

–

DCL

K

A1

+

D15

A

+

D

13A+

D

11A+

D

9

A

+

D

7A+

D

5A+

D

3A+

D

1

A

+

DC

LK

A2+

L

V

DS

 DA

T

A P

A

T

H >

CM

O

S

/L

V

D

S

 DAT

A P

AT

H >

L

V

DS

 DA

T

A P

A

T

H >

CM

O

S

/L

V

D

S

 DAT

A P

AT

H >

D17

B

–

D

16B–

D

1

4

B–

D12B–

D

10B–

D

8B–

D

6B–

D

4B–

D

2B–

D

0B–

D17B+

D

16

B

+

D14B+

D

12B+

D

10B+

D

8B+

D

6B+

D

4

B

+

D

2

B

+

D

0

B

+

DC

L

KB1

–

D15B–

D

1

3

B–

D11

B

–

D

9B–

D

7B–

D

5B–

D

3B–

D

1B–

DC

LK

B2

–

DCL

K

B1

+

D15

B

+

D

13B+

D

11B+

D

9

B

+

D

7B+

D

5B+

D

3

B

+

D

1

B

+

DC

LK

B2+

(J

2

) DAT

A BUS 1

(J

3

) DAT

A BUS 2

0667

6-02

1

 

Figure 21. J2 and J3 Pin Mapping 

Содержание HSC-ADC-EVALC

Страница 1: ...jitter clock source High speed ADC evaluation board and ADC data sheet PC running Windows 98 2nd edition Windows 2000 Windows ME or Windows XP Latest version of VisualAnalog USB 2 0 port recommended U...

Страница 2: ...Setup 4 Jumpers 5 HSC ADC EVALC ADC Capture Board Features 6 HSC ADC EVALC Supported ADC Evaluation Boards 7 Theory of Operation 8 Configuration 8 Input Circuitry 8 Data Capture 8 Code Description 8...

Страница 3: ...re digital data at speeds up to 644 MSPS single data rate SDR and 800 MSPS double data rate DDR The FPGA contains an integrated FIFO memory that allows capture of data record lengths up to a total of...

Страница 4: ...e other end is a 2 1 mm inner diameter jack that connects to the PCB at J4 6 Once the USB cable is connected to both the computer and the HSC ADC EVALC board and power is applied the USB driver starts...

Страница 5: ...Using ADC Evaluation Board and HSC ADC EVALC ADC Capture Board JUMPERS Default Settings Table 1 lists the default settings for the HSC ADC EVALC evaluation kit Table 1 Jumper Configurations Jumper Num...

Страница 6: ...O USB SPI CONTROL DATA BUS 1 DATA BUS 2 FPGA LOAD SELECT ON BOARD POWER SUPPLY 100MHz OSCILLATOR FPGA I O VOLTAGE MODE FPGA CONFIG PROM XILINX VIRTEX 4 FPGA DEBUG PINS EXTERNAL SYNC I O CYPRESS USB CO...

Страница 7: ...ces ADC capture board product page at www analog com FIFO for a list of HSC ADC EVALC compatible ADC evaluation boards Some legacy ADC boards may require interposer cards to facilitate proper pin mapp...

Страница 8: ...or 3 3 V logic levels and can accept LVDS or CMOS inputs Each channel of the ADC capture board requires a clock signal to capture data These clock signals are normally provided by the attached ADC eva...

Страница 9: ...f 32 EVALUATION BOARD SCHEMATICS AND ARTWORK HSC ADC EVALC SCHEMATICS 06676 005 TYCO AND DSP EZ KIT CONNECTOR TO FPGA XC4VFX20 10FFG672C XC4VFX20 10FFG672C XC4VFX20 10FFG672C XC4VFX20 10FFG672C R38 10...

Страница 10: ...Rev 0 Page 10 of 32 06676 006 SRAM ADDRESS AND CONTROL FPGA CONTROLS U21 NC7SZ05M5X R1 100 R40 3 74K R44 3 74K R42 3 74K R41 3 74K R43 3 74K XC4VFX20 10FFG672C R28 3 74K R27 249 R33 249 R25 3 74K R31...

Страница 11: ...HSC ADC EVALC Rev 0 Page 11 of 32 FPGA TO SRAM DATA XC4VFX20 10FFG672C 06676 007 XC4VFX20 10FFG672C Figure 7...

Страница 12: ...HSC ADC EVALC Rev 0 Page 12 of 32 AD19 TO BE USED WITH HIGHER DENSITY SRAM DEVICES 06676 008 Figure 8...

Страница 13: ...HSC ADC EVALC Rev 0 Page 13 of 32 SRAM AND FPGA POWER 06676 009 XC4VFX20 10FFG672C XC4VFX20 10FFG672C R66 499 R64 499 R65 499 R63 499 Figure 9...

Страница 14: ...HSC ADC EVALC Rev 0 Page 14 of 32 06676 010 REFCLK Oscillator for IDELAYCTRL FPGA BYPASS CAP SRAM A BYPASS CAP SRAM B BYPASS CAP R15 24 Figure 10...

Страница 15: ...HSC ADC EVALC Rev 0 Page 15 of 32 06676 011 DEBUG PINS UNUSED ROCKET I 0 CONNECTIONS XC4VFX20 10FFG672C XC4VFX20 10FFG672C Figure 11...

Страница 16: ...HSC ADC EVALC Rev 0 Page 16 of 32 06676 012 ROCKET I 0 CONNECTIONS Figure 12...

Страница 17: ...HSC ADC EVALC Rev 0 Page 17 of 32 06676 013 USB CONNECTIONS R49 3 74 R71 3 74 R48 100K SDI SDO DIRECTIONS ARE WITH RESPECT TO THE DEVICE UNDER CONTROL USB Direct I O 3 3V Figure 13...

Страница 18: ...HSC ADC EVALC Rev 0 Page 18 of 32 USB CONNECTIONS CONTINUED 06676 014 4 5 2 1 3 6 R52 3 74K R72 3 74K R46 499 XC4VFX20 10FFG672C XC4VFX20 10FFG672C J6 Figure 14...

Страница 19: ...HSC ADC EVALC Rev 0 Page 19 of 32 06676 015 EZ KIT EXPANSION INTERFACE FOR DSPs P1 P2 P3 Figure 15...

Страница 20: ...HSC ADC EVALC Rev 0 Page 20 of 32 06676 016 TYCO HM Zd CONNECTORS J1 HS SERIAL SPI AUX J2 DATA BUS 1 J3 DATA BUS 2 Figure 16...

Страница 21: ...HSC ADC EVALC Rev 0 Page 21 of 32 06676 017 CONFIGURATION EEPROM JTAG CONNECTOR EEPROM HARDWARE RECONFIGURATION PUSHBUTTON R57 3 74K R73 ZERO R77 100 R78 100 R75 3 74K R76 3 74K Figure 17...

Страница 22: ...HSC ADC EVALC Rev 0 Page 22 of 32 POWER AND VOLTAGE REGULATORS 06676 018 TSW 102 08 G D DO NOT REMOVE R68 147k Figure 18...

Страница 23: ...S 1 DATA BUS 2 XILINX VIRTEX 4 FPGA DEBUG PINS EXTERNAL SYNC I O CYPRESS USB CONTROLLER USB CONNECTOR FPGA JTAG CONNECTOR 5VDC POWER INPUT FPGA LOAD SELECT ON BOARD POWER SUPPLY 100MHz OSCILLATOR FPGA...

Страница 24: ...1A D9A D7A D5A D3A D1A DCLKA2 DCLKA1 D15A D13A D11A D9A D7A D5A D3A D1A DCLKA2 LVDS DATA PATH CMOS LVDS DATA PATH LVDS DATA PATH CMOS LVDS DATA PATH D17B D16B D14B D12B D10B D8B D6B D4B D2B D0B D17B D...

Страница 25: ...O_6 I O_8 CSB_1 CSB_2 CSB_3 CSB_4 USB_3 USB_5 J1 HS SERIAL SPI AUX HIGH SPEED SERIAL REFERENCE CLK HIGH SPEED SERIAL DATA INPUTS FUTURE HIGH SPEED SERIAL DATA INPUTS FPGA GENERAL PURPOSE I O SPI CONT...

Страница 26: ...D7 SD3 AD1 A8 I O_6 AA3 B8 I O_5 Y3 C8 SD2 G1 D8 SD2 H1 A9 I O_4 W3 B9 I O_3 V3 C9 SD1 A4 D9 SD1 A3 A10 I O_2 P3 B10 I O_1 N3 C10 MGTCLK1 K1 D10 MGTCLK1 L1 Table 4 HSC ADC EVALC J2 I O Connections to...

Страница 27: ...H9 B2 D1A G9 C2 D2A E8 D2 D2A E7 A3 D3A L10 B3 D3A L9 C3 D4A J9 D3 D4A K10 A4 D5A C3 B4 D5A D3 C4 D6A E3 D4 D6A F3 A5 D7A D5 B5 D7A E5 C5 D8A C4 D5 D8A D4 A6 D9A B7 B6 D9A C7 C6 D10A B6 D6 D10A C6 A7...

Страница 28: ...MD AVX TPSC106K025R0500 2 C47 C51 Capacitor 47 F 10 V tantalum TEL SMD Epcos Inc B45197A2476K309 2 C49 C50 Capacitor 1000 pF 50 V ceramic Y5V 0402 Panasonic ECG ECJ 0EF1H102Z 17 C5 C19 C23 C24 C31 C53...

Страница 29: ...5 0402 SMD Panasonic ECG ERJ 2GE0R00X 2 R53 R70 Resistor 80 6 k 1 16 W 1 0402 SMD Panasonic ECG ERJ 2RKF8062X 1 R54 Resistor low value 1206 SMD 0 04 TT Electronics LRC LR1206LF 01 R040 F 1 R55 Resisto...

Страница 30: ...ences SOT 23 RT 3 do not install Analog Devices ADR512ART 0 R9 Resistor 6 2 k 1 16 W 5 0402 SMD do not install Panasonic ECG ERJ 2GEJ622X 0 R12 R13 R14 R51 Resistor 0 1 16 W 5 0402 SMD do not install...

Страница 31: ...HSC ADC EVALC Rev 0 Page 31 of 32 NOTES...

Страница 32: ...HSC ADC EVALC Rev 0 Page 32 of 32 NOTES 2007 Analog Devices Inc All rights reserved Trademarks and registered trademarks are the property of their respective owners EB06676 0 4 07 0...

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