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EVAL-SSM2301 

 

 

Rev. 0 | Page 4 of 8 

LAYOUT GUIDELINES 

1.

 

Place at least nine vias on the solder pad for the thermal 
pad of the amplifier for proper conduction of heat to the 
opposite side of the board. The outer diameter of the vias 
should be 0.5 mm and the inner diameter should be 0.25 mm 
to 0.3 mm. Use a PCB area of at least 2 cm

2

 equivalent area 

on the opposite side of the layer of the amplifier chip as a 
heat sink. Also, extend the ground pad (for the thermal 
pad) as much as possible on the amplifier side of the PCB 
as a heat sink (see Figure 4). If internal layers are available, 
allocate a certain area as a heat sink; make sure to connect the 
vias conducting the heat to the internal layers.  

0

710

8-

0

06

TOP LAYER

INTERNAL
AND/OR
BOTTOM LAYER

 

Figure 4. Heat Sink Layout 

2.

 

Place the EMI filtering beads, B1, B2 and B3, as close to the 
amplifier chip as possible.  

3.

 

Place the decoupling capacitors for the beads, C8, C9, and 
C12, as close to the amplifier chip as possible, and connect 
all their ground terminals together as close as possible. 
Ideally, solder their ground terminals together, as shown in 
Figure 5; do not rely on PCB tracks or ground planes for 
connecting their ground terminals together.  

0

71

08

-00

7

C8

C12

C9

C10

C13

C11

INPUT
TRACK

OUTPUT
TRACK

SMALL

INDUCTOR

COPPER

FILL

 

Figure 5. Placement and Routing for Decoupling Capacitors 

4.

 

The 1 nF capacitor and the ferrite bead can block the EMI 
for up to 250 MHz. To eliminate EMI higher than 250 MHz, 
place a low value small size capacitor, such as a 100 pF, 0402 
size capacitor, in parallel with the 1 nF decoupling capacitor. 
Place this small capacitor a short distance away from the 
1 nF capacitor and use the PCB connection track as an 
inductor to form a PI shape low-pass filter, as shown in 
Figure 5.  

5.

 

If implementing a PCB track PI filter, the arriving input 
PCB track and the leaving output PCB track connection to 
the decoupling capacitor should not be connected. The 
correct layout example is shown in Figure 5. The incorrect 
layout is shown in Figure 6. 

6.

 

Decouple the input port nodes with small capacitors, such 
as a 100 pF C3 and a 100 pF C4. They are not necessary but 
can lower the input EMI. 

0

71

08

-00

8

C8

C12

C9

C10

C13

C11

INPUT
TRACK

OUTPUT
TRACK

 

Figure 6. Wrong Routing for the Inductive Track Output Decoupling 

Capacitor 

 

Содержание EVAL-SSM2301

Страница 1: ... half bridge output stage a full H bridge enables direct coupling of the audio power signal to the loudspeaker doubling the output voltage swing and eliminating the need for a large output coupling capacitor Another benefit of a full H bridge is an increase of the maximum output power by 4 when compared to a half bridge under the same load impedance These benefits are particularly useful for low v...

Страница 2: ...luation Board Description 1 Revision History 2 Evaluation Board Hardware 3 Switches 3 Getting Started 3 Layout Guidelines 4 Evaluation Board Schematic and Artwork 5 Ordering Information 7 Bill of Materials 7 Ordering Guide 7 ESD Caution 7 REVISION HISTORY 5 08 Revision 0 Initial Version ...

Страница 3: ...ted in Figure 3 The lower side of the board has a switch bank with the follow ing functions S1A Upper position short circuits the input coupling capacitor for positive input port Lower position open circuits the input coupling capacitor for positive input port S1B The same functions as the S1A switch but for the coupling capacitor connected to the negative input port S1C Upper position short circu...

Страница 4: ...solder their ground terminals together as shown in Figure 5 do not rely on PCB tracks or ground planes for connecting their ground terminals together 07108 007 C8 C12 C9 C10 C13 C11 INPUT TRACK OUTPUT TRACK SMALL INDUCTOR COPPER FILL Figure 5 Placement and Routing for Decoupling Capacitors 4 The 1 nF capacitor and the ferrite bead can block the EMI for up to 250 MHz To eliminate EMI higher than 25...

Страница 5: ...21SN1 1 2 BLM18EG221SN1 L1 3 3µH NO_POP L2 3 3µH NO_POP 4 3 2 1 2 1 2 1 2 1 HD3 2 1 2 1 3 HD2 HD4 TB1 OUT OUT 1 1 GND GND 1 1 GND PGND 1 1 C8 1nF 2 1 C9 1nF 2 1 C10 100pF 2 1 C11 100pF 2 1 C12 10µF 2 1 C4 100pF 2 1 C3 100pF 2 1 C13 10µF B1 B2 1 2 BLM18EG221SN1 B3 VDD J2 PS_JACK 2 9 S1B 5PDT C2 220nF 1 2 1 10 S1A 5PDT C1 220nF 3 8 S1C 5PDT 3 2 1 HD1 IN IN GND GND 1 1 1 1 J1 AUDIO JACKET 2 3 1 2 1 R...

Страница 6: ...O INPUT J1 HD2 SSM2301 EVAL BOARD REV 2 0 OUT OUT GND GND IN IN HD1 OFF ON S1 U1 SSM2301 R6 R7 R1 R2 C1 C2 C7 C3 C4 R4 R3 C6 L2 L1 B1 C8C10 C13 C11 B3 B2 C9 C12 07108 001 Figure 8 SSM2301 Evaluation Board Rev 2 0 Layout 07108 002 Figure 9 Bottom Layer of the Evaluation Board 07108 003 Figure 10 Mirrored Bottom Layer of the Evaluation Board ...

Страница 7: ...0 μF 6 3 V X5R 0603 Digi Key PCC2395TR ND 2 L1 L2 Inductor 3 3 μH type D62LCB SMD Digi Key A918CY 3R3M 3 B1 B2 B3 Filter chip 220 Ω 2 A 0603 Digi Key 490 3992 2 ND 5 S1 S1A S1B S1C S1D S1E Switch DIP top slide 5 position SMD Digi Key CKN6074 ND 1 J1 Audio connectors 3 5 mm SMT Mouser 806 STX 3500 3N 1 J2 DC power connectors 2 mm SMT power jack Mouser 806 KLDX SMT20202A 1 U1 Filterless high efficie...

Страница 8: ...EVAL SSM2301 Rev 0 Page 8 of 8 NOTES 2008 Analog Devices Inc All rights reserved Trademarks and registered trademarks are the property of their respective owners EB07108 0 5 08 0 ...

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