UG-1308
Rev. A | Page 19 of 24
HSDAC
ADC
INPUT
MUX
P
N
PGA
ADC
RCAL0
PR0
DR0
NR1
TR1
T9
CALIBRATION
CURRENT
P_NODE
EXCITATION
AMPLIFIER
EXTERNAL
R
CAL
N_NODE
RCAL1
HPTIA_N
R
TIA2
1.11V (HSTIACON[1:0] = 00b]
HPTIA_P
P_NODE
N_NODE
HPTIA_P
HPTIA_N
16
887
-02
3
Figure 33. High Speed DAC, High Speed TIA, and Switch Matrix Settings for R
TIA2
Calibration
HSDAC
P
N
PGA
ADC
RCAL0
PR0
DR0
NR1
TR1
CALIBRATION
CURRENT
P_NODE
EXCITATION
AMPLIFIER
EXTERNAL
R
CAL
N_NODE
RCAL1
DE0
HPTIA_N
R
TIA2_03
R
LOAD_03
1.11V (HSTIACON[1:0] = 00b]
HPTIA_P
P_NODE
N_NODE
HPTIA_P
HPTIA_N
T6
T10
1688
7-
024
ADC
INPUT
MUX
Figure 34. High Speed DAC, High Speed TIA, and Switch Matrix Settings for R
TIA2_03
Calibration
PR0
HSDAC
P
N
PGA
ADC
RCAL0
DR0
NR1
TR1
CALIBRATION
CURRENT
P_NODE
EXCITATION
AMPLIFIER
EXTERNAL
R
CAL
N_NODE
RCAL1
DE1
HPTIA_N
R
TIA2_05
R
LOAD_05
1.11V (HSTIACON[1:0] = 00b]
HPTIA_P
P_NODE
N_NODE
HPTIA_P
HPTIA_N
T8
T10
1688
7-
025
ADC
INPUT
MUX
Figure 35. High Speed DAC, High Speed TIA, and Switch Matrix Settings for R
TIA2_05
Calibration