User Guide
EVALUATION BOARD CONFIGURATION
Rev. 0 | 5 of 9
INPUT AND OUTPUT CONNECTIONS
details the digital input and output connections, and
details the M-LVDS input and output connections.
Table 1. Digital I/O Connections
Connection
DI
RO
SMA Connector
J1
J2
Terminal Connector
J1-4 via R2
J1-4 via R1
Load Capacitor
None
C2 (not populated)
Termination Resistor
R3
None
Table 2. M-LVDS Input and Output Connections
Receiver
Transmitter
Connection
A
B
Y
Z
SMA Connector
J5
J6
J8
J9
Termination Resistor
RT2
RT1
JUMPER CONNECTIONS
details the jumper configurations.
Table 3. Jumper Configurations
Jumper
Position
Description
LK1
A
Connects the RE pin of the ADN4693E-1 to VCC, which disables the receiver. This places the RO output into a high impedance state.
B
Connects the RE pin of the ADN4693E-1 to the RE connection on the J1-4 screw terminal connector.
C
Connects the RE pin of the ADN4693E-1 to GND, which enables the receiver.
LK2
A
Connects the DE pin of the ADN4693E-1 to VCC, which enables the driver.
B
Connects the DE pin of the ADN4693E-1 to the DE connection on the J1-4 screw terminal connector.
C
Connects the DE pin of the ADN4693E-1 to GND, which disables the driver. This places the Y and Z outputs into a high impedance state.
D
Connects the DE pin of the ADN4693E-1 to the RE pin of the ADN4693E-1. Set the state of both the DE and RE signals using the LK1 jumper.