Analog Devices EVAL-AD5141DBZ, Руководство пользователя

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Evaluation Board User Guide UG-473
Rev. 0 | Page 15 of 20
DAUGHTER BOARD
J3-1
J3-2
J3-3
J3-4
J3-5
J4-1
J4-2
J4-3
J4-4
J4-5
J1-
1
J1-
2
J1-
3
J1-
4
J1-
5
J1-
6
J1-
7
J1-
8
J2-
1
J2-
2
J2-
3
J2-
4
J2-
5
J2-
6
J2-
7
J2-
8
J2-
9
J2-
10
J2-
11
J2-
12
ADDR0 ADDR1 S
DA
S
CL
SYN
C
S
DO
S
DI
S
CL
K
VDD
RESET
WP
LRDAC
DIS
INDE P
A1 W1 B1 A2 W2 B2
A3
W3
B3 A4
W4
B4
AG
ND
DG
ND
VL OGIC
VSS
V
DD
V
DD
9 10 8 14 6 12 11 7 13 1 5
VSS
C3
+
C4
A
W
B
A U1
A
D
5141
W B
2 3 4
16 15
L
RDAC
L
RDAC
V
L
OGIC
DI
S
VSS
A1 A2
W1 W2
B1
A W B
B2
B2
W1
A1
O
PA
M
P PR
O
T
EC
T
IO
N
A8
B
A
A7
B
A
A6
CI
RCUI
T
CO
NNE
CT
IO
N
A–
AM
P
L
IF
IE
R
B–
DAC +
AT
T
E
NUAT
O
R
B
A
ADDR1
|S
DO
ADDR0
|S
Y
NC
S
DA|
DI
N
R
ESET
WP
V
DD
V
L
OGIC
DI
S
S
DO
|ADDR1
S
Y
NC|
ADDR0
DI
N|
S
DA
S
CL
K|
S
CL
R
ESET
WP
G
ND
VSS
INDE
P
INDE
P
0.
1u
F
10u
F
C2
V
L
OGIC
+
C1 0.
1u
F
10u
F
V
L
OGIC
G
ND
V
DD
U2
ADG
7
7
4
DI
S
DG
ND
15
EN
D4 D3 D2 D1
S4
A
S3
A
S4
B
S3
B
S2
A
S1
A
S2
B
S1
B
SYN
C
ADDR0 S
DO
ADDR1 S
DI
S
DA
S
CL
K
V
L
OGIC
INDE
P
D
EPEN
V
L
OGIC
S
CL
ADDR0
|S
Y
NC
12
9 7 4
13 14 10 11 6 5 3 2 16
ADDR1
|S
DO
S
DA|
DI
N
S
CL
|S
CL
K
IN
1
DG
ND
DG
ND
DG
ND
V
L
OGIC
DG
ND
V
L
OGIC
DG
ND
DG
ND
ADDR0 ADDR1
INDE
P
A2
I2C SPI
B
A
A3
B
A
A4
B
A
A5
B
A
11010- 016
Figure 17. Schematic of Daughter Board