Analog Devices EVAL-AD1940EB, Руководство пользователя

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EVAL-AD1940EB/AD1941EB
Rev. 0 | Page 5 of 32
SWITCH AND JUMPER FUNCTIONS
The AD1940EB/AD1941EB have many switch and jumper
settings, but for most uses, many of these need to be set only
once and can be ignored after that. Table 1 shows the function
of each jumper and switch on the evaluation boards. For switch
package S1, logic high (1) is up (assuming analog inputs are at
the top of the boards) and logic low (0) is down. Jumper J21
provides a +20 dB gain in Position A and a +40 dB gain in
Position B.
The functions for SW2 and SW9 are explained in more detail in
Table 2 and Table 3.
Table 1. Switches and Jumpers
Reference
Designator
Function
S1-1 Set PLL_CTRL0
S1-2 Set PLL_CTRL1
S1-3 Set PLL_CTRL2
S1-4 Set ADR_SEL
SW2 Input mode select
SW9 Output mode select
SW6 to SW8 Set direction (I/O) of external MCLKs
LK5/LK14 Select which signal is sent to
AD1940/AD1941 PLL
LK1 Connects/disconnects MCLK input to
AD1939
LK2/LK3 Connect/disconnect 12.288 MHz crystal from
AD1939’s oscillator circuit
J24 Select microphone or line input to AD1871
left channel
LK4 Enables/disables phantom power for
microphone input
SW10
Selects between RCA and optical S/PDIF
input
J21 Sets microphone gain to +20 dB or +40 dB
ROTARY SWITCH SETTINGS
SW2 and SW9 are hex rotary switches that control the input
and output signal routing on the evaluation boards. The
position of these switches controls which serial data signals and
clocks are routed to and from the AD1940/AD1941. Table 2
shows the settings of Rotary Switch SW2. This switch controls
the routing of signals to the AD1940/AD1941 (U1) serial input
port. Table 2 indicates which serial data signals are sent to each
of the four serial data inputs, as well as the clock source. If
“slave” is indicated as the clock source, the LRCLK and BCLK
signals are fed to input CPLD U13 from a source connected to
output CPLD U15. An “x” in the table indicates that no signal is
sent to the input pin on U1 in that mode. Switch Position A to
Switch Position F are unused.
Table 3 shows the settings of Rotary Switch SW9. This switch
controls the routing of the signals out of the AD1940/AD1941
(U1) serial output ports. Table 3 indicates where the serial data
outputs are sent, as well as the source of the LRCLK and BCLK
signals. If “slave” is indicated as the clock source, the LRCLK
and BCLK signals are fed to output CPLD U15 from a source
connected to input CPLD U13. An “x” in the table indicates
that no signal is output from the pin on U1 in that mode. Switch
Position F of SW9 is unused.
Table 2. SW2 Settings
SW2 Position SDATA_IN0 SDATA_IN1 SDATA_IN2 SDATA_IN3 Clock Source
0 S/PDIF 1939 ADC1/2 1939 ADC3/4 Ext In 0 S/PDIF master
1 1939 ADC1 and ADC2 1939 ADC3/4 1871 Ext In 0 1871 master
2 S/PDIF Ext In 0 Ext In 1 Ext In 2 Ext In master
3 1939 ADC1 and ADC2 1939 ADC3/4 Ext In 0 Ext In 1 Slave
4 1939 ADC1 and ADC2 1939 ADC3/4 Ext In 0 S/PDIF 1939 ADC master
5 Ext In 0 Ext In 1 Ext In 2 Ext In 3 Ext In master
6 Ext In 0 Ext In 1 Ext In 2 Ext In 3 Slave
7 x x 1939 (TDM) x 1939 master
8 x x Ext In 2 (TDM) Ext In 3 (TDM) Ext In master
9 x x Ext In 2 (TDM) Ext In 3 (TDM) Slave