UG-1634
Rev. 0 | Page 11 of 15
CLOAD
CLOAD
CLOAD
CHANNEL C
CHANNEL A
GOLD PINS FOR
COMPENSATION CAPACITOR
GOLD PINS FOR
COMPENSATION CAPACITOR
CONNECT 1 TO 2, 3 TO 4, 5 TO 6
TO USE PMOS:
CONFIGURING PX,PY, PZ, PA
GOLD PINS FOR
COMPENSATION CAPACITOR
CONNECT 1 TO 3
ALL COMPONENTS TO BE CONFIRMED!
CHANNEL EXTERNAL COMPONENTS
TO BYPASS PMOS:
CHANNEL D
CHANNEL B
CLOAD
DNI
SM
CJ
40
CA-
T
R
0.
068
µ
F
0.
068
µ
F
1759017
RED
0.
068
µ
F
100
Ω
FDC5614P
SM
CJ
40
CA-
T
R
0.001µF
DNI
BAV9
9W
T1
G
10k
Ω
10k
Ω
0.
01µ
F
RED
GND
1759017
10k
Ω
0.001µF
GND
TSW-103-08-G-D
0.001µF
DNI
0.001µF
TSW-103-08-G-D
100
Ω
FDC5614P
SM
CJ
4
0
C
A-
TR
0.
068µ
F
100
Ω
FDC5614P
TSW-103-08-G-D
S
M
CJ
4
0CA
-T
R
FDC5614P
BAV9
9
W
T1
G
100
Ω
2k
Ω
0.
01µ
F
0.
01µ
F
RED
TSW-103-08-G-D
RED
DNI
RED
DNI
RED
RED
DNI
RED
DNI
RED
RED
DNI
RED
DNI
RED
RED
DNI
DNI
RED
RED
DNI
RED
RED
RED
0.
0
1µ
F
2k
Ω
0.
01µ
F
GND
GND
10k
Ω
2k
Ω
2k
Ω
1759017
0.
01µ
F
GND
10k
Ω
0.
0
1µ
F
GND
10k
Ω
2k
Ω
2k
Ω
1759017
BAV9
9W
T1
G
GND
RED
RED
RED
RED
RED
GND
RED
GND
2k
Ω
2k
Ω
GND
GND
GND
RED
RED
BAV9
9W
T1
G
10k
Ω
RED
10k
Ω
0.
0
1µ
F
RED
C41
C40
C38
C39
SENSEH_A
I/OP_B
I/ON_C
I/OP_D
R46
C3
7
SENSEHF_D
VIOUTN_D
SENSELF_D
SENSEH_C
CR4
D4
R45
D3
C3
6
C3
3
C3
0
D2
R36
Q2
P7
D1
C3
1
R35
VIOUTN_C
R37
R40
P6
SENSEHF_A
I/OP_A
CR
1
SENSEH_D
SENSEHF_C
SENSEL_C
SENSEHF_B
SENSEL_B
SENSEH_B
R29
SENSEL_A
VIOUTN_A
SENSEL_D
CR2
Q3
CR3
Q4
CH_C
CH_D
R31
R32
R33
R34
C2
9
C2
8
C3
2
R38
C3
4
C3
5
R44
R43
R42
R41
Q1
R27
P12
P13
R39
VIOIUTN_B
SENSELF_B
I/ON_B
I/OP_C
SENSELF_C
I/ON_D
R30
R28
SENSELF_A
C2
7
C2
6
I/ON_A
CH_A
CH_B
SENSEHF_D
SENSEH_D
VIOUTN_D
SENSEL_D
SENSELF_C
CCOMP_D
VIOUTP_C
CCOMP_B
VIOUTP_B
CCOMP_A
CASCODE_C
CCOMP_C
SENSEL_C
SENSEHF_C
SENSEH_C
VIOUTN_C
SENSEHF_B
SENSEH_B
VIOUTN_B
SENSEHF_A
SENSEH_A
VIOUTN_A
AGND_SENSE
SENSELF_D
SENSEL_B
SENSELF_B
AGND_SENSE
CASCODE_B
SENSEL_A
VIOUTP_A
AGND_SENSE
CASCODE_A
AGND_SENSE
SENSELF_A
CASCODE_D
VIOUTP_D
1
1
21
12
2
1
3
6
21
1
2
1
1
1
1
1
5
3
2
1
2
1
1
1
1
1
2
3
1
3
2
1
1
2
2
5
4
1
2
5
6
3
3
6
4
2
1
5
3
6
4
2
1
5
3
6
4
2
1
5
3
6
4
2
1
4
3
6
5
2
1
4
3
6
5
2
1
2
1
1
4
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
1
1
1
D
S
D
G
D
S
D
G
D
S
D
G
D
S
D
G
21
413
-017
Figure 13. Channel Input/Output Circuitry Including Screw Terminals
