background image

Demonstration circuit 2837A is easy to set up to evaluate 

the performance of the LTC2063/LTC2066. The DC2837A 

board provides multiple empty mostly-0805 component 

footprints for users to configure the LTC2063/LTC2066 

as desired. 
The default configuration of the board is in 

unity gain/

buffer with split supplies (V

+

 and V

)

Refer to Figure 1 for a generic schematic, Figure 2 for 

measurement equipment setup, and Table 1 for a jumper 

table, and follow the procedure below.
 

Note:

 Unless otherwise specified, leave jumpers in 

default positions, and components unstuffed. Table 1 

explains each jumper setting in further detail.

1.  Verify that jumper 

JP6

 for 

SHDN

 is on position 1, 

labeled 

EN

, so that the part is enabled.

2.  Verify that jumper 

JP4

 is across 2–3 for GND so the 

board is in split supply mode.

3.  Set the power supply’s positive output to +2.5V and 

the negative output to –2.5V. 

 

Note:

 The supply limits are 

±2.62V

 in 

split

 sup-

ply, and 

1.7V to 5.25V

 in 

single

-supply (V

 = GND) 

configuration.

4.  With power off, connect the power supply to the row 

of turrets at the top of the board: + supply to V

+

 tur-

ret, –supply to V

 turret, and COM to GND turret.

5.  Connect a signal generator either at the +IN and GND 

turrets or at the +IN SMA input. A 100Hz sine wave 

with 0V offset and 0.5V

P-P

 is a good starting point. 

 

Note:

 The input lowpass filter at IN

+

 has a cutoff 

of  480Hz for DC2837A-A (LTC2063) and 2.4kHz 

for DC2837A-B (LTC2066).

6.  Connect an Oscilloscope 10× probe to the OUT turret. 

Clip scope probe GND to a GND turret. Set the scaling 

to 100mV/2ms per division.

7.  Power-up the system. A 100Hz 0.5V

P-P

 sine wave 

centered at 0V should appear on the oscilloscope.

8.  Increase the signal amplitude and observe the signal 

for clipping as signals reach the supply rails. Slew 

and settling behavior can be evaluated by switching 

the signal generator to square wave.

9.  To evaluate shutdown performance, move the jumper 

at 

JP6

 to position 3, labeled 

DIS

, tying 

SHDN

 to V

To re-enable the part, move the 

JP6

 jumper back to 

EN

 (position 1).

10. 

OPTIONAL:

 To evaluate shutdown performance with 

a shutdown control signal, 

remove any jumper con-

nectors on JP6 completely

. Connect a signal gen-

erator to the 

SHDN

 turret and GND. Set the signal 

generator to a 5V

P-P

, 0V offset, 1Hz square wave. 

Keep the input sine wave on. Adjust oscilloscope 

time scale to 100ms/div at least. Observe the part’s 

output shutting down and returning, and the supply 

current dropping when shut down and rising again 

when turned back on.

Table 1. Jumper Table

JUMPER

POSITION 1 

OR STUFFED*

POSITION 3 

OR UNSTUFFED*

NOTES

JP1

V

+

V

Add DC Offset, or 

Connects Filter 

Component Z1 to –IN

JP2*

Ties –IN to V

+

 

or V

 via Z1

Disconnects 

–IN from V

+

 or 

V

 via Z1

Z1 Unstuffed by Default

JP3

V

+

V

Add DC Offset to +IN; 

R9, R10 Allow for 

Scaling/Dividing

JP4

V

 Tied to GND 

(Single-Supply)

Separate 

V

 and GND 

(Split Rail)

3rd Position GND for 

Jumper Storage when 

Using Split Rails

JP5

Add Z2 in 

Parallel with R5 

Feedback

Short Out R6 

in Series with 

Output

Default Open Path 

(Z2 Unstuffed)

JP6

V

+

, Enable

V

, Disable

Remove Jumper 

Completely if Using 

External 

SHDN

 Control

* Two-Terminal Jumper ONLY (JP2)

2

DEMO MANUAL 

DC2837A-A/DC2837A-B

Rev. 0

QUICK START PROCEDURE

Содержание DC2837A-A

Страница 1: ...wcasing the micropower zero drift op amp LTC 2063 A option or LTC2066 B option with shut down in an SC70 6 pin package The board is laid out for mostcommonopampapplicationsandleftmostlyunstuffed to maximize flexibility for a wide range of applications The DC2837A includes the SC70 package op amp jump ers unity gain configuration resistors input lowpass fil ters reverse supply protection and supply...

Страница 2: ... to a GND turret Set the scaling to 100mV 2ms per division 7 Power up the system A 100Hz 0 5VP P sine wave centered at 0V should appear on the oscilloscope 8 Increase the signal amplitude and observe the signal for clipping as signals reach the supply rails Slew and settling behavior can be evaluated by switching the signal generator to square wave 9 To evaluate shutdown performance move the jumpe...

Страница 3: ...4 V V V V V 2 V V V GND SHDN ENABLE SINGLE OR SPLIT SUPPLY DC BIAS DC BIAS FEEDBACK INPUT FILTER EN DIS 1 1 1 1 3 3 3 3 2 2 2 2 SPLIT SINGLE V V DC2837A B F01 S 3 DEMO MANUAL DC2837A A DC2837A B Rev 0 Figure 1 Simplified Generic Schematic QUICK START PROCEDURE Figure 2 Proper Measurement Equipment Setup POWER SUPPLY 2 50V COM SigGen 100 0Hz OSCILLOSCOPE DC2837A B F02 ...

Страница 4: ... at IN is desired the resistors at R1 and R2 may be swapped R1 10k R2 0Ω and the capacitor C1 populated with either 33nF for LTC2063 or 6 8nF LTC2066 Jumper JP2 must be installed for C1 to be connected In general to minimize the effect of chopper clock feedthrough signal bandwidths should be limited to at least a decade below the internal chopping frequency which is 5kHz for LTC2063 and 25kHz for ...

Страница 5: ...rt ing gain of RFB RG The DC bias added to IN is set by divider Z1 and R1 and the DC bias added to IN is set by divider R9 and R3 Figure 5 Non Inverting Gain R4 may be optionally populated with a resistor equivalent to RG RFB for increased precision over temperature R4 will cancel out IB and potential parasitic thermocouples at the inputs OUT 1 3 IN IN J1 C10 0 1µF R1 0Ω R3 0Ω R2 RG R4 RG RFB R6 0...

Страница 6: ...s connected at the inputs can poten tially lead to clock feedthrough appearing in the output especially if the gain setting of the amplifier is not high enough that GBW roll off will naturally attenuate signals at the clock frequency Placing a capacitor in parallel with a large RFB can help filter out this undesired clock signal On this board if RFB is R5 a filter capacitor can be stuffed in Z2 if...

Страница 7: ... Filter Component Values BUTTERWORTH BESSEL R1 681k 806k R2 169k 88 7k Z1 681k 806k C1 10nF 10nF C2 2 2nF 2 2nF Figure 8 Building A Second Order Active Lowpass Filter with DC2837A 1 Stuff Z6 with 0Ω to tie IN to GND 2 Remove C11 and R5 3 Stuff C1 leave JP2 connected OUT 1 3 IN JP6 C10 0 1µF R2 R1 R8 1k R6 0Ω R7 49 9Ω C1 Z1 JP5 JP2 JP1 R5 C R5 Z6 0Ω V 2 V ENABLED DC2837A B F08 S 4 Replace R1 and R2...

Страница 8: ... not disclose or transfer any portion of the Evaluation Board to any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred d...

Отзывы: