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ADXL180 

 

Rev. 0 | Page 18 of 56 

BUS

VOLTAGE

SYNC

DETECT/

BLANKING

DEVICE 1

ADXL180

RETURN

CURRENT

DEVICE 1

V

BP

ADC BUSY

DEVICE 1

SYNC

DETECT/

BLANKING

DEVICE 2

ADXL180

RETURN

CURRENT

DEVICE 2

TIME

ADC BUSY

DEVICE 2

DEVICE 2

DATA FRAME

DEVICE 2

DATA FRAME

BUS

CURRENT

DEVICE 1

DATA FRAME

t

DLY

t

SPD

DEVICE 1

DATA FRAME

t

SPP

t

ADC

t

STD

t

B

t

ADC

t

SPP

t

M

BUS

DISCHARGE

CURRENT

t

M

t

B

V

SPT

TIME SLOT A

TIME SLOT B

07

54

4-

0

33

 

Figure 14. Synchronization Pulse Timing (Dual Device) 

 

Содержание ADXL180 iMEMS

Страница 1: ...us option APPLICATIONS Crash sensing GENERAL DESCRIPTION The ADXL180 iMEMS accelerometer is a configurable single axis integrated satellite sensor that enables low cost solutions for front and side im...

Страница 2: ...26 Phase 1 Power on Reset Initialization 26 Phase 2 Device Data Transmission 26 Phase 2 Mode Description 28 Phase 3 Self Test Diagnostic 35 Phase 4 Auto Zero Initialization 38 Phase 5 Normal Operation...

Страница 3: ...Page 3 of 56 RG 2 0 51 MD 1 0 52 SYEN 53 AZE 53 ERC 53 DAT 53 SVD 53 CUPAR and CUPRG 53 Axis of Sensitivity 54 Branding 55 Outline Dimensions 56 Ordering Guide 56 REVISION HISTORY 8 08 Revision 0 Ini...

Страница 4: ...0 625 0 669 g LSB 350 g Range 8 bit Data 3 255 3 50 3 745 g LSB 10 bit Data 0 830 0 8925 0 955 g LSB 500 g Range 8 Bit Data 4 650 5 00 5 350 g LSB 10 Bit Data 1 163 1 2500 1 338 g LSB Offset All rang...

Страница 5: ...Selectable Number of CRC Bits 3 x x x0 Number of Parity Bits 1 Even Synchronization Pulse Detect No Detect Limit VSPND 3 0 V Detect Threshold VSPT 3 5 V VBP VBN VSPT 14 5 V see Figure 12 Threshold Hys...

Страница 6: ...ice Data State Phase 2 ms Mode 0 tDD0s 9 tPS ms Mode 1 tDD1s 480 tPS ms Mode 2 tDD2s 480 tPS ms Mode 3 tDD3s 512 tPS ms Self Test State Phase 3 Self Test Time3 tSTS 1728 tPS ms Self Test Interval tSTI...

Страница 7: ...This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to abso...

Страница 8: ...ces Use Only VBN or do not connect 5 VDD Voltage Regulator Bypass Capacitor 6 NC Reserved for ADI Use Only VBN or do not connect 7 VSCO Reserved for ADI Use Only Do not connect 8 VBN Negative Bus Volt...

Страница 9: ...ed as the amount of time necessary for the Manchester encoded signal IMOD to transition from 10 to 90 of its final value ISIG Device fall time is the amount of time required for the IMOD signal to fal...

Страница 10: ...al environmental noise see Figure 5 The ADXL180 acceleration sensor uses two electrically isolated mechanically coupled sensors to measure acceleration as shown in Figure 5 The clock phasing of the re...

Страница 11: ...available allowing two devices to be on the same bus using time division multiplexing where each device transmits its data during a known time slot Synchronization is achieved by voltage modulated syn...

Страница 12: ...chronization pulse enable disable Data Link Layer ISO Layer 2 The specifics of the data frame format including the data width 8 bit or 10 bit data state vector enable disable and error detection parit...

Страница 13: ...Capacitor tolerances of 10 are recommended CURRENT MODULATION When the ADXL180 device is powered on it uses current modulation to transmit data Normally the device pulls IIDLE current When modulating...

Страница 14: ...ogic 0 Logic 1 0 Manchester 1 Default 1 0 Falling edge Rising edge 1 Manchester 2 0 0 Rising edge Falling edge The phase of the Manchester encoded data can be selected via a bit in the configuration r...

Страница 15: ...zation pulse the ADXL180 transmits its data Configuring the ADXL180 for Synchronous Operation Table 7 Sync Enable SYEN Options SYEN Definition 0 Synchronization pulse disabled The device transmits dat...

Страница 16: ...Enable BDE Definition 0 Bus discharge disabled default 1 Bus discharge enabled Only active when SYEN 1 The bus discharge enable BDE bit in the configuration regis ters can be set to aid in the discha...

Страница 17: ...wires from the control module for power and communications This is accomplished using time division multiplexing where each device transmits its data during a known time slot The time slot used by eac...

Страница 18: ...ETECT BLANKING DEVICE 2 ADXL180 RETURN CURRENT DEVICE 2 TIME ADC BUSY DEVICE 2 DEVICE 2 DATA FRAME DEVICE 2 DATA FRAME BUS CURRENT DEVICE 1 DATA FRAME tDLY tSPD DEVICE 1 DATA FRAME tSPP tADC tSTD tB t...

Страница 19: ...ed in a series configuration The two devices automatically configure the two node network upon power up The configura tion bit ADME must be set to enable the autodelay mode A device with the ADME bit...

Страница 20: ...pology NC NC 07544 035 The two devices are wired in a series configuration as shown in Figure 16 The series configuration can be configured to run in either of two modes fixed delay or autodelay These...

Страница 21: ...a frame can be broken into four specific fields as follows Start bits two start bits are always transmitted at the start of the data frame These bits are used to synchronize the center module decoder...

Страница 22: ...VECTOR 0 10 BIT DATA P 0 1 2 3 4 5 6 7 8 9 START BITS 0 1 0 1 2 CRC 0 10 BIT DATA 1 2 3 4 5 6 7 8 9 START BITS 0 1 0 1 2 CRC 0 8 BIT DATA 1 2 3 4 5 6 7 START BITS 0 1 0 1 2 CRC 0 1 2 STATE VECTOR 0 8...

Страница 23: ...or disabled SVD 1 The ADXL180 transmits a configuration error code during run time and no sensor data is transmitted Table 14 8 Bit Full Sensor Data Range Coding Decimal Hex Binary Twos Complement Des...

Страница 24: ...ter data The data field contains serial number and or configura tion data See the ADXL180 State Machine section for the device data transmission specifics for each MD1 to MD0 selection 0 1 0 Self Test...

Страница 25: ...180 can be programmed to utilize a 3 bit CRC The polynomial used for the encoding is x3 x1 x0 The CRC calculation is performed from MSB to LSB on the entire data frame The CRC state registers are init...

Страница 26: ...en the internal reset signal is deasserted until the beginning of Phase 2 This time allows for circuit stabilization and entry into configuration mode No data is transmitted during Phase 1 No errors a...

Страница 27: ...ode 0 Mode 1 or Mode 2 is selected the device data is 8 bit data If the 10 bit data mode is selected in combination with Phase 2 Mode 0 Mode 1 or Mode 2 the 8 bitdevice data is left justified in the 1...

Страница 28: ...ta is transmitted in response to the synchronization pulse generated by the control module See the Synchronization Pulse Detection section PHA TRANSMIT SN0 BYTE tP tP tP tP tP tP tP tP tP TRANSMIT SN1...

Страница 29: ...the 10 bit data mode are selected all range data is transmitted with two zero value LSBs appended that is left justified data as shown in Table 24 Note that when Mode 1 is selected with the state vec...

Страница 30: ...Bits and User Register UREG The user bits U11 to U0 information transmitted during Phase 2 Mode 2 maps into the user and configuration register data stored in the OTP memory of the ADXL180 This includ...

Страница 31: ...x Decimal Hex 127 0x7F 508 0x1FC Undefined Unused 126 0x7E 504 0x1F8 Undefined Unused 125 0x7D 500 0x1F4 Error code Device error 124 0x7C 496 0x1F0 Undefined Unused 123 0x7B 492 0x1EC Undefined Device...

Страница 32: ...0x80 512 0x200 Status code 100 g measurement range Table 31 Phase 2 Mode 2 Delimiter Coding Range State Vector Code 8 Bit Data 10 Bit Data Decimal Hex Decimal Hex 50 g 001b 125 0x83 500 0x20C 100 g 0...

Страница 33: ...gative full scale ends of the sensor data range overlap with the device data and status data codes The state vector distinguishes between the types of transmitted data The state vector identifies the...

Страница 34: ...488 0x1E8 Undefined Unused 487 0x1E7 Status Device OK 486 0x1E6 Undefined Unused Undefined Unused 465 0x1D1 Undefined Unused 464 0x1D0 Acceleration Data Most positive FS acceleration value Acceleratio...

Страница 35: ...that of the movable frame When self test is activated the voltage between the fixed plates and the moving plates in the forcing cells is changed This creates an attractive electrostatic force which ca...

Страница 36: ...onsecutive ADC samples VSTP 6 Disable self test voltage 7 Wait 32 consecutive ADC samples 8 Average 64 consecutive ADC samples VSTZ2 9 Compare measured values a Compare VSTZ1 to specified minimum and...

Страница 37: ...ETMIN VSTZ2 OFFSETMAX YES NO ENTER SELF TEST CYCLE CALCULATE STD VSTP VSTZ1 STDMIN STD STDMAX NO YES CALCULATE STZ VSTZ1 VSTZ2 STZ 4 LSB NO YES 07544 048 Figure 27 First Half Is Joined to Second Half...

Страница 38: ...opriate error code is set and the error state is entered The error code is transmitted until the device is reset See Table 39 for error code specifics No acceleration data is transmitted when the ADXL...

Страница 39: ...of the output filter to the desired bandwidth The ADXL180 low pass filter is a third order low pass Bessel filter with a 60 dB per decade roll off See the Specifications table for more information on...

Страница 40: ...maximum specified value The appropriate error code is sent in the next data frame transmitted to the control module see the Offset Error Offset Drift Monitoring section This message is sent continuous...

Страница 41: ...if this error is due to a parity error in one of the ERC SVD DAT or MAN bits that govern the format of the transmitted message the error code is transmitted in an alternate data format Receive system...

Страница 42: ...is value is outside of the datasheet specifications then an error is reported at the start of Phase 5 Additionally the ADXL180 continuously monitors long term offset drift If the long term offset corr...

Страница 43: ...g of the part 600g 0g 600g 07544 054 g EQUIVALENT 0 8 VDD 2 3 2 VSCI TEST PIN VOLTAGE Figure 32 VSCI Signal Chain Input Test Pin Transfer Function VSCO ANALOG SIGNAL CHAIN OUTPUT TEST PIN The VSCO ana...

Страница 44: ...signal uses pulse duration modula tion to combine the clock and digital data The clock and data are encoded as shown in Figure 33 The ADXL180 acknowledges entering the configuration mode by transmitti...

Страница 45: ...ero disabled Data is transmitted LSB first This is an 18 bit protocol including the two start bits Although similar to the ADIFX protocol it is different in that parity and not CRC is used as the erro...

Страница 46: ...parity bit is set for even parity The parity bit should be set to 0 or 1 to make the total number of 1s in the data frame even The data is transmitted LSB first as shown in Table 42 DATA ADDRESS P 2 1...

Страница 47: ...nfiguration system as a handshake This provides a data integrity check for data write commands If there is an attempt to write data to a RAM register after the CUPRG bit is set the data is ignored by...

Страница 48: ...XL180 can be configured to send this data as part of the device data transmitted during Phase 2 of the power up initialization sequence PROGRAMMING THE CONFIGURATION AND USER DATA REGISTERS When the d...

Страница 49: ...equent communications requests because it waits for the required programming voltage The device does not attempt to program unless the required voltage level is achieved The user s test system should...

Страница 50: ...d User Data Bit Map Configuration Mode Register Address Configuration Mode Register Name MSB D6 D5 D4 D3 D2 D1 LSB D7 D0 0000b UREG UD7 UD6 UD5 UD4 UD3 UD2 UD1 UD0 0001b CREG0 UD8 BDE MD1 MD0 FDLY DLY...

Страница 51: ...has been detected See the Synchronous Communication section for more details and timing information SCOE Table 48 SCOE VSCO Signal Chain Output Enable SCOE Definition 0 VSCO output disabled Default 1...

Страница 52: ...lection 0 1 0 0 Full 0 1 0 1 Reduced 0 1 1 0 Reduced 0 1 1 1 Reduced 2 8 Bit Coded Device Data3 UD 7 0 Serial Number And Range 1 0 0 0 Full 1 0 0 1 Reduced 1 0 1 0 Reduced 1 0 1 1 Reduced 3 10 Bit Cod...

Страница 53: ...rror Check ERC Bit Options ERC Definition 0 3 bit CRC is included in message Calculate CRC using the polynomial x3 x1 x0 Default 1 One parity bit is included in the message CRC is not used It is a bit...

Страница 54: ...Page 54 of 56 ADXL180 XXXX XXXX AXIS OF SENSITIVITY XOUT 0g XOUT 0g ADXL180 XXXX XXXX XOUT 1g ADXL180 XXXX XXXX XOUT 1g ADXL180 XXXX XXXX XOUT 0g EARTH S SURFACE 07544 003 Figure 41 Output Response v...

Страница 55: ...Y CL CL CL CL CL Y P 180Z XL W W 07544 006 Figure 42 ADXL180 Laser Brand Table 64 ADXL180 Branding Key Line Text Description 1 XL Accelerometer 2 180Z ADXL180Z 3 YY Year code 3 WW Week code 4 CL Lot c...

Страница 56: ...PER CONNECTION OF THE EXPOSED PAD REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET Figure 43 16 Lead Lead Frame Chip Scale Package LFCSP_LQ 5 mm 5 mm Body Thick Quad...

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