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ADV8005 Hardware Reference Manual UG-707
svsp_frc_latency_measure_en , Secondary VSP Map, Address 0xE662[2]
This bit is used to enable measuring frame/Hsync latency.
Function
svsp_frc_latency_measure_e
n
Description
0 (default) Disable
1 Enable
svsp_rb_frame_latency[2:0] , Secondary VSP Map, Address 0xE6F2[7:5] (Read Only)
This signal is used to readback the realtime frame latency.
Function
svsp_rb_frame_latency[2:0] Description
0xXXX Frame latency
svsp_rb_hsync_latency[11:0] , Secondary VSP Map, Address 0xE6F3[7:0]; Address 0xE6F4[7:4] (Read Only)
This signal is used to readback the realtime Hsync latency.
Function
svsp_rb_hsync_latency[11:0] Description
0xXXX HSync latency
svsp_rb_max_latency[14:0] , Secondary VSP Map, Address 0xE6F5[7:0]; Address 0xE6F6[7:1] (Read Only)
This signal is used to readback the maximum frame/Hsync latency. Upper 3 bit is VS latency, Lower 12 bit HS latency.
Function
svsp_rb_max_latency[14:0] Description
0xXXX Maximum of frame latency
svsp_rb_min_latency[14:0] , Secondary VSP Map,
Address 0xE6F7[7:0]; Address 0xE6F8[7:1] (Read Only)
This signal is used to readback the minimum frame/Hsync latency. Upper 3 bit is VS latency, Lower 12 bit HS latency.
Function
svsp_rb_min_latency[14:0] Description
0xXXX Minimum of frame latency
3.3.1.6. Freezing Output Video
Output video can be frozen by disabling the VIM by setting svsp_enable_vim to 0.
3.3.2. SVSP Video Input Module (VIM)
Figure 63: SVSP Video Input Module
Figure 63 shows the structure of the SVSP VIM. This can be broken up into three hardware blocks. The VIM cropper can be used to crop an
input video image to a given image size. The scaler can be used to scale a video resolution to any target resolution. The pixel packer is used to
pack pixels data into memory words and write them into external memory. The starting address in external memory is provided by FFS and is
configured by the user using the frame buffer registers. As indicated at the start of Section
3.3, in order for the VIM module to operate, it must
first be enabled. This can be done using the svsp_enable_vim bit. If the VIM is disabled by setting this register to 0, the output video will be frozen.
VIM
Cropper
Video Input Module (VIM)
Input
Video
Write to
DDR2
FFS
Horizontal/Vertical
Scaler
Pixel
Packer
VIM
Cropper
Video Input Module (VIM)
Input
Video
Write to
DDR2
FFS
Horizontal/Vertical
Scaler
Pixel
Packer
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