Analog Devices ADV8005, Справочник по аппаратуре

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UG-707 ADV8005 Hardware Reference Manual
Rev. A | Page 104 of 317
3. VIDEO SIGNAL PROCESSING
3.1. INTRODUCTION
The primary function of the ADV8005 is high performance video processing, such as motion adaptive de-interlacing, flexible scaling and frame
rate conversion, as well as additional video processing such as noise reduction, CUE correction, and aspect ratio/panorama scaling.
This section details the registers used to control the Video Signal Processing (VSP) hardware.
The three constituent sections of the
ADV8005 video processor are the PVSP, SVSP, and the PtoI converter. These hardware blocks are
completely independent of each other and can be placed in various configurations within the ADV8005 .
Access to an external DDR2 memory can be required for the PVSP and SVSP to operate correctly. The PVSP needs access to external DDR2
memory in every mode except game mode. While the SVSP uses external DDR2 memory for the majority of operations, in the case of down
converting from 1080p to 720p (with the same frame rate), no external memory is required and all conversions can take place in internal line
memories. The PtoI converter does not need access to external DDR2 memory.
3.2. PRIMARY VSP
3.2.1. Introduction to PVSP
Figure 53: ADV8005 PVSP
Figure 53 shows the structure of the PVSP which comprises three sections: the Video Input Module (VIM), the Video Output Module (VOM),
and a controller referred to as the Field Frame Scheduler (FFS).
The VIM is used to capture input video data which it then writes to external DDR2 memory. The VIM is also capable of cropping input video
data and performing horizontal downscaling. Before the VIM writes video data to external memory, it first packs the video into the appropriate
data formats. In game mode, VIM will send packed 128-bit words to VOM directly instead of writing them into external memory.
The VOM is used to read data from external memory, format this data into 12-bit pixels, perform various functions on this data (scaling, de-
interlacing, and so on), and then output this video from the PVSP. Many of the PVSP video processing functions are implemented in the VOM.
In game mode, the VOM will use data from the VIM instead of reading data from external memory.
The FFS is used to schedule and control the interaction between the VIM, external DDR2 memory, and the VOM. Field/frame buffer scheduling,
field polarity management, and FRC management are all implemented in the FFS.
The PVSP can be bypassed by setting
pvsp_bypass .