ADV8003 Hardware Manual
Rev. B, August 2013
69
2.
ADV8003 TOP LEVEL CONTROL
36/48-
bit
Video
Port
24-bit
Input
Port
Primary
VSP
Secondary
VSP
Output
Muxing
HDMI
Tx2
HDMI
Tx1
HD
Encoder
SD
Encoder
DDR2 Memory
Interface
Progressive to
Interlaced
ADV8003
36-bit
Video
Port
Serial
Video�
RX
24-bit
Input
Port
Primary
V
- Deinterlacer
- Scaler
- Video enhance
SP
Secondary
V
-Scaler
SP
Output
Muxing
HDMI
Tx2
HDMI
Tx1
HD
Encoder
SD
Encoder
DDR2 Memory
Interface
Progressive to
Interlaced
ADV8003
Colour
Space
Conversi
Colour
Space
Conversio
Data
Formatting,
CSC &
ACE
Col
o
Spa
c
Con
v
Data
Formatting
& CSC
Data
Formatting
& CSC
Input
Muxing
Output
Muxing
Interim
Muxing
OSD Core
- OSD scaler
- External OSD
- Internal OSD
VSP - YCbCr 4:4:4 Input and Output
Figure 14: ADV8003 Simplified Block Diagram
A simplified block diagram of the ADV8003 can be seen in
. Video can be routed through the ADV8003 in a number of ways, for
example, the OSD can be blended before the PVSP to display the OSD on all outputs, the OSD can be blended before the output to display
the OSD on a single output. This has been divided into several modes of operation which are recommended by Analog Devices. These
modes of operation are documented in
2.1 and outline the most practical modes in which to configure the ADV8003.
The four main processing blocks of the ADV8003 are described as follows.
PVSP:
This is the main scaler of the ADV8003 and contains many of the signal processing functions. This block performs motion
adaptive de-interlacing as well as scaling, ACE, FRC, cadence detection, CUE correction, RNR, BNR and MNR. PVSP utilizes the external
DDR2 memory for such processes as FRC, de-interlacing and RNR. (Refer to Section
for more details on the PVSP.)
SVSP
: This is the secondary scaler in the ADV8003 and is useful when providing an additional output resolution. The input to this block
can only be progressive. This means an input format can only be connected to the SVSP if it is progressive or if it has been de-interlaced by
the PVSP block. (Refer to Section
3.3 for more details on the SVSP.)
OSD Blend:
This block overlays the generated OSD on the incoming video signal, from the Serial Video input lines or from the video
TTL port. This is determined by an alpha factor as to how transparent the OSD will be. Depending on the source of the OSD data (from
an external OSD solution or DDR2 memory), this is then synchronized with the incoming video signal. If the generated resolution is the
same as the video, the OSD is simply overlaid on the video. If both are at different resolutions, the OSD scaler will first scale the OSD data
to match the incoming video. (Refer to Section
for more details on the OSD.)
Progressive to Interlaced:
The ADV8003 has two progressive to interlaced (PtoI) blocks, one of these is included as part of the SVSP. The
second is a standalone block. The function of this block is exactly as named and can be used, for example, if the user was to convert an ED
format such as 480p to a HD format such as 1080i. The PtoI block would be required as part of this conversion. (Refer to Section
and
Section
for more details on the PtoI hardware blocks.)
Содержание ADV8003
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