ADSP-2126x SHARC Processor Hardware Reference
13-11
Precision Clock Generator
Bypass as a One Shot
When the
STROBEA
bit (bit 0 of the
PCG_PW
register) or
STROBEB
bit (bit 16
of the
PCG_PW
register) is set (= 1), the One Shot option is used. When the
STROBEx
bit is set (= 1), the frame sync is a pulse with a duration equal to
one period, or one full cycle, of
MISCA2_I
for unit A and
MISCA3_I
for unit
B that repeats at the beginning of every clock input period. This pulse is
generated during the high period when the
INVFSA/B
bits (bits 1 or 17,
respectively = 0), are cleared or low period when invert bit (
INVFSA/B
= 1)
of the input clock.
A
strobe period
is equal to the period of the normal clock input signal spec-
ified by
FSASOURCE
(bit 30 in the
PCG_CTLA_1
register for unit A) and
FSBSOURCE
(bit 30 in the
PCG_CTLB_1
register for unit B).
The output pulse width is equal to the period of the SRU source signal
(
MISCA2_I
for frame sync A and
MISCB3_I
for frame sync B). The pulse
begins at the second rising edge of
MISCxx_I
following a rising edge of the
clock input. When the
INVFSA/B
bit is set, the pulse begins at the second
rising edge of
MISCxx_I
coincident or following a falling edge of the clock
input.
For more information, see “Group E Connections – Miscellaneous Sig-
nals” on page 12-23.
Figure 13-4. Frame Sync Bypass
CL OCK INPU T
FO R FRAM E S Y NC
FRAM E S YN C OUT PU T
(INV FS A = 0, S TRO BE A = 0)
FRAM E S YN C OUT PU T
(INV FS A = 1, S TRO BE A = 0)
Содержание ADSP-21261 SHARC
Страница 30: ...Contents xxx ADSP 2126x SHARC Processor Hardware Reference ...
Страница 40: ...Register Diagram Conventions xl ADSP 2126x SHARC Processor Hardware Reference ...
Страница 58: ...Differences From Previous SHARCs 1 18 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 112: ...Secondary Processing Element PEy 2 54 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 178: ...Summary 3 66 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 204: ...DAG Instruction Summary 4 26 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 322: ...Setting Up DMA 7 32 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 436: ...SPORT Programming Examples 9 86 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 521: ...ADSP 2126x SHARC Processor Hardware Reference 11 31 Input Data Port rts IDP_ISR end ...
Страница 522: ...Input Data Port Programming Example 11 32 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 590: ...Timer Programming Examples 14 20 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 796: ...I O Processor Registers A 174 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 800: ...B 4 ADSP 2126x SHARC Processor Core Manual ...
Страница 846: ...Index I 36 ADSP 2126x SHARC Processor Hardware Reference ...