UG-1098
ADE9000 Technical Reference Manual
Rev. 0 | Page 38 of 86
Stop Filling on Trigger
When WF_CAP_SEL = 1 and WF_MODE[1:0] is equal to 1,
stop filling on trigger mode is selected. Use this mode to
analyze the ADC samples leading up to an event of interest.
In this mode, the waveform buffer is filled continuously. When
the entire buffer is filled up to Address Location 0xFFF, the
filling continues from Address Location 0x800 in a circular
fashion. The events listed in Table 24 are classified as trigger
events. Upon receiving an enabled trigger event, the
stops filling the waveform buffer.
The events listed in Table 24 can be enabled as waveform buffer
triggers, in the WFB_TRG_CFG register.
Table 24. Waveform Buffer Trigger Events in the
WFB_TRG_CFG Register
Bit No. Bit Name
Description
10
TRIG_FORCE Set this bit to trigger an event to stop
the waveform buffer filling
9
ZXCOMB
ZXCOMB event
8
ZXVC
ZX event in Phase C voltage
7
ZXVB
ZX event in Phase B voltage
6
ZXVA
ZX event in Phase A voltage
5
ZXIC
ZX event in Phase C current
4
ZXIB
ZX event in Phase B current
3
ZXIA
ZX event in Phase A current
2
OI
Overcurrent event
1
SWELL
Swell event
0
DIP
Dip event
The trigger events in WFB_TRG_CFG[10:0] correspond to
interrupt events within the
, with the exception of the
TRIG_FORCE bit. The user can set the TRIG_FORCE bit,
WFB_TRG_CFG[10], to stop the filling the waveform buffer in
this mode.
When one of the events configured in WFB_TRG_CFG occurs,
the filling of the buffer stops and the WFB_TRIG bit is set in
the STATUS0 register, which can be configured to generate an
interrupt on the IRQ0 pin. The address of the IN waveform of
the last sample set is stored in the WFB_TRIG_ADDR bits of
the WFB_TRG_STAT register. Because the filling stops when
the event occurs, any sample sets with addresses greater than
the WFB_TRIG_ADDR value contain old data.
To ensure that a buffer’s worth of samples has been captured
before the event, follow this sequence:
1.
Select stop capture on trigger mode: WF_CAP_SEL = 1,
WF_MODE = 1.
2.
Disable all trigger events by writing WFB_TRG_CFG = 0.
3.
Make sure that the buffer has been filled one time by enabling
an interrupt to occur on IRQ0 when the last page is filled,
by setting only Bit 15 in the WFB_PQ_IRQEN register and
enabling the PAGE_FULL bit in the STATUS0 register.
Alternatively, the LAST_PAGE register can be read instead
of using the interrupt.
4.
Start the capture by writing WF_CAP_EN = 1.
5.
Wait for the buffer to be filled (indicated by when the
PAGE_FULL interrupt occurs or LAST_PAGE = 15).
6.
When the buffer is filled, enable the desired waveform
buffer events in the WFB_TRG_CFG register and set the
WFB_TRIG_IRQ bit in the STATUS0 to generate an
interrupt when the event has occurred and the waveform
buffer has stopped filling.
7.
When WFB_TRIG_IRQ occurs, read the WFB_TRIG_ADDR
register to obtain the address of the trigger event, which is
within a sample or two of when the event occurred and is
the last filled address.
Waveform buffer values are retained when the waveform buffer
is disabled by clearing the WF_CAP_EN bit in the WFB_CFG
register; however, LAST_PAGE and WFB_TRIG_ADDR are
reset when that bit is cleared. Read the LAST_PAGE and
WFB_TRIG_ADDR registers prior to writing WF_CAP_EN = 0.
The trigger events given in Table 24 must be enabled or disabled
prior to enabling the waveform buffer by writing to the
WFB_TRG_CFG register.
Then, to perform the next filling operation in the stop filling
on trigger mode, disable the waveform buffer by clearing the
WF_CAP_EN bit of the WFB_CFG register, and then enable it
again by setting the same bit to 1. Note that if the TRIG_FORCE
bit was set to force a trigger, it must be cleared in the
WFB_TRG_CFG register prior to starting the next capture
(before writing WF_CAP_EN = 1).
Center Capture Around Trigger
The center capture around trigger mode is enabled when
WF_CAP_SEL = 1 and WF_MODE[1:0] = 2, and is similar to
the stop on trigger mode, except that the waveform buffer does
not stop filling after the trigger event. Even after the occurrence
of the trigger event, the filling of the buffer continues to take
place for the next 1024, 32-bit memory locations before
stopping. It is recommended to use this mode to analyze
samples before and after an event. See the Stop Filling on
Trigger section for more information about trigger events.
Note that in center trigger mode, the WFB_TRIG bit in the
STATUS0 register is set when the enabled trigger event occurs,
and the WFB_TRG_IRQ bit in the STATUS0 register is set
when the 1024 additional memory locations have been filled
and the waveform buffer filling stops. Both of these status bits
can be configured to generate an interrupt on the IRQ0 pin.
Calculate the last filled address using WFB_TRIG_ADDR:
If (WFB_TR1024>0xFFF,
Last Filled Address = WFB_TRIG_ADDR-1024;
Else
Last Filled Address = WFB_TR1024;
