Analog Devices ADDS-21992-EZLITE, Руководство пользователя

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ADSP-21992 EZ-KIT Lite Evaluation System Manual
4-31
The source of reset for the ADSP-21992 can be chosen by configuring jumper JP2. When JP2 is
in the 2-3 position, the POR output pin of the ADSP-21992 is tied to the reset pin of the ADSP-
21992. When JP2 is in the 1-2 position, the source of reset for the ADSP-21992 is the reset button
(S1), the external power-on reset IC (ADM708), or a reset command from Vi+ through
the USB interface. The 1-2 position is the default and recommended configuration when using the
Vi+ development tools.
4.2.3 Analog Input Interface
The ADSP-21992 EZ-KIT Lite board permits up to eight analog inputs to be fed from the analog
inputs connector, P4, to the eight ADC channels of the ADSP-21992. All eight analog inputs at
the analog inputs connector may range from -1V to +1V.
There is a separate interface circuit for each of the eight ADC channels of the ADSP-21992.
These analog interface circuits convert the nominal
±
1 V signals at the analog inputs connector
P4 to signals centered on the ADSP-21992 reference voltage level (either the internally derived
1.0V level or the externally provided 1.024V level). The analog interface circuits, consisting of
high-performance operational amplifiers and precision resistors, effectively offset the analog
inputs by the reference voltage level.
Two AD8044 quad operational amplifiers (A5 & A6) are used for the analog interface and are
configured as summing unity-gain stages. A5 is used to interface the VIN0, VIN1, VIN2, and
VIN3 analog inputs. A6 is used to buffer the VIN4, VIN5, VIN6, and VIN7 inputs.
Precision 10 K Ω resistors for input and feedback ensure accurate gain matching of all channels.
In addition, 47 pF feedback capacitors provide simple low-pass filtering with a very high cut-off
frequency (339 kHz) on all analog inputs.
The analog inputs are applied to the ADSP-21992 in a single-ended fashion, so that the inverting
inputs to the sample-and-hold amplifiers of the ADSP-21992 (ASHAN and BSHAN) are
connected to a buffered version of the reference voltage. A representation of the analog interface
circuit for one of the ADC channels is shown in
Figure 4-3 . As shown in the schematics at the
end of this document, each analog input stage also contains a small RC filter at the operational
amplifier output.
-
+
R
R
R
R
C
VIN1
V1
VREF
AD8044
+AVDD
-AVDD
Figure 4-3: One Analog Interface Circuit of ADSP-21992 EZ-KIT Lite Board