Evaluation Board User Guide
UG-072
Rev. A | Page 5 of 20
EXTENDED SETUP
POWER SUPPLY
The evaluation board is powered by a single supply through
Connector J14. The voltage on J14 should be 6 V dc to 9 V dc
with the ability to source at least 200 mA. The tip of the power
supply connector should be the positive voltage. This single
supply is regulated to 3.3 V for both the analog and digital
planes. The ADAU1401A generates 1.8 V from the 3.3 V supply
using its integrated regulator.
DIGITAL AUDIO INPUTS AND OUTPUTS
Digital signals can be connected to the board in two different
formats. The evaluation board can input or output a standard
2-channel S/PDIF stream. These I/Os can be either electrical (J5
and J4) or optical (U13 and U29). The S/PDIF I/O streams are
connected to the SDATA_IN0 and SDATA_OUT0 serial data
ports and are active according to specific switch settings on S2.
The copy protection bit on the S/PDIF transmitter is set; therefore,
audio devices, such as digital recorders, may ignore the data
output from the evaluation board.
PCM digital audio data can also be interfaced to the ADAU1401A.
This data is connected to the ADAU1401A through the GPIO
interface board that is connected to J12. Input Header J3 and
Output Header J2 can connect to external ADCs, DACs, and
codecs with an I
2
S, left-justified, right-justified, or TDM data
stream. Master clock, left/right clock, and bit clock connections
are also on these headers.
Up to four stereo audio signals can be input or output on each
of these headers. These signals, when selected by the rotary
mode switches, interface directly to the serial data ports of the
ADAU1401A. These headers also serve as the I/Os for the
multi-channel TDM streams.
ANALOG AUDIO INPUTS AND OUTPUTS
The evaluation board can input two analog audio signals and
can output four signals using the converters of the
ADAU1401A. The full-scale input voltage is 2.0 V rms and the
full-scale output voltage is 0.9 V rms.
Mini-jack J11 is the input to the ADCs. Mini-jack J1 and Mini-
jack J3 are the DAC output connectors. The output is low-pass
filtered with either an active anti-image filter using a U3 op amp
or a passive RC filter. The active filters’ −3 dB cutoff frequency
is 100 kHz and has an approximate third-order Bessel (linear
phase) response.
MASTER CLOCK SETTINGS
The master clock connection of the ADAU1401A is set with
Jumper LK1 to Jumper LK4. These allow the user to select as a
source either the on-board oscillator connected to an external
crystal (OSC), the S/PDIF receiver’s master clock output (DIR),
an external clock from J12 (EXT), or a dedicated clock connection
on a BNC connector, J13 (BNC). If any setting other than OSC
is chosen, then disconnect Jumper LK16, which couples the
oscillator circuit of the ADAU1401A to the crystal. If this
jumper is not removed, there could be two clocks on the PCB
running at very close frequencies. These clocks could easily cause
serious performance degradation on the converters of the
ADAU1401A.
CONTROL INTERFACE
J16 is the connection for the USBi. The USBi is used to send I
2
C
and SPI control data to the ADAU1401A on the evaluation board.
This provides a real-time programming and tuning connection
to SigmaStudio.
Note that the evaluation board also includes footprints for an
obsolete USB interface using Connector J16. This section of the
board has been replaced by the USBi’s functionality.
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