Analog Devices AD6659, Руководство пользователя

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Evaluation Board User Guide UG-003
Rev. A | Page 3 of 40
EVALUATION BOARD HARDWARE
The evaluation board provides all of the support circuitry
required to operate these parts in their various modes and
configurations. Figure 2 shows the typical bench characterization
setup used to evaluate the ac performance. It is critical that the
signal sources used for the analog input and clock have very low
phase noise (<1 ps rms jitter) to realize the optimum performance
of the signal chain. Proper filtering of the analog input signal to
remove harmonics and lower the integrated or broadband noise
at the input is necessary to achieve the specified noise performance.
The evaluation board covers multiple families of ADCs and is
populated slightly differently between the families. Table 1 shows
the three main families and the ADCs that fall within each family.
When a reference is made to the
AD9269 , for example, this
applies to all the ADCs within that family, that is, the AD9251 ,
the AD9231 , and the AD9204 , the AD9269, and the AD6659 .
Table 1.
Family Name ADCs within Each Family
AD9650 AD9650
AD9268 AD9268, AD9258
AD9269 AD9251, AD9231, AD9204, AD9269, AD6659
See the Evaluation Board Software Quick Start Procedures section
to get started, and see Figure 17 to Figure 31 for the complete
schematics and layout diagrams. These diagrams demonstrate
the routing and grounding techniques that should be applied at
the system level when designing application boards using these
converters.
POWER SUPPLIES
This evaluation board comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output. Connect
the supply to the rated 100 V ac to the 240 V ac wall outlet at
47 Hz to 63 Hz. The output from the supply is provided through
a 2.1 mm inner diameter jack that connects to the printed circuit
board (PCB) at P101. The 6 V supply is fused and conditioned
on the PCB before connecting to the low dropout linear regulators
(default configuration) that supply the proper bias to each of the
various sections on the board.
The evaluation board can be powered in a nondefault condition
using external bench power supplies. To do this, the E101, E102,
E114, E103, E105, and E107 ferrite beads can be removed to
disconnect the outputs from the on-board LDOs. This enables
the user to bias each section of the board individually. Use P102
and P103 to connect a different supply for each section. A 1.8 V
supply is needed with a 1 A current capability for DUT_AVDD and
DRVDD; however, it is recommended that separate supplies be
used for both analog and digital domains. An additional supply
is also required to supply 1.8 V for digital support circuitry on
the board, DVDD. This should also have a 1 A current capability
and can be combined with DRVDD with little or no degradation in
performance. To operate the evaluation board using the SPI and
alternate clock options, a separate 3.3 V analog supply is needed
in addition to the other supplies. This 3.3 V supply, or 3V_CLK,
should have a 1 A current capability.
Two additional supplies, 5V_AMPVDD and 3V_AMPVDD,
are used to bias the optional input path amplifiers and optional
VREF buffer. If used, these supplies should each have 1 A current
capability.
A second optional power supply configuration allows replacing
the LDOs that supply the AVDD and DRVDD rails of the ADC
with the
ADP2114 step-down dc-to-dc regulator. Using this
switching controller in place of the LDO regulators to power the
AVDD and DRVDD supplies of the ADC allows customers to
evaluate the performance of the ADC when powered by a more
efficient regulator.
INPUT SIGNALS
When connecting the clock and analog source, use clean signal
generators with low phase noise, such as the Rohde & Schwarz SMA,
or HP 8644B signal generators or an equivalent. Use a 1 m shielded,
RG-58, 50 Ω coaxial cable for connecting to the evaluation board.
Enter the desired frequency and amplitude (see the Specifications
section in the data sheet of the respective part). When connecting
the analog input source, use of a multipole, narrow-band band-
pass filter with 50 Ω terminations is recommended. Analog Devices,
Inc., uses TTE and K&L Microwave, Inc., band-pass filters. The
filters should be connected directly to the evaluation board.
If an external clock source is used, it should also be supplied
with a clean signal generator as previously specified. Typically,
most Analog Devices evaluation boards can accept ~2.8 V p-p or
13 dBm sine wave input for the clock.
OUTPUT SIGNALS
The default setup uses the Analog Devices high speed converter
evaluation platform (HSC-ADC-EVALCZ) for data capture.
The CMOS output signals from Channel A and Channel B are
buffered through U801 and U802 and are routed through P903
and P902, respectively, to the FPGA on the data capture board.